Ist1 And Ist0 And Interrupt Servicing Status - NEC PD754144 User Manual

(4) Interrupt status flag
The interrupt status flags (IST0 and IST1) indicate the status of the processing currently being executed by
the CPU and are included in PSW.
The interrupt priority controller controls nesting of interrupts according to the contents of these flags as shown
in Table 7-3.
Because IST0 and IST1 can be changed by using a 4-bit or bit manipulation instruction, interrupts can be nested
with the status under execution changed. IST0 and IST1 can be manipulated in 1-bit units regardless of the
setting of MBE.
Before manipulating IST0 and IST1, be sure to execute the DI instruction to disable interrupts. Execute the
EI instruction after manipulating the flags to enable interrupts.
IST1 and IST0 are saved to the stack memory along with the other flags of PSW when an interrupt is
acknowledged, and their statuses are automatically changed one higher. When the RETI instruction is
executed, the original values of IST1 and IST0 are restored.
The contents of these flags are cleared to "0" when the RESET signal is asserted.
Status of Processing
IST1 IST0
under Execution
0 0 Status 0
0 1 Status 1
1 0 Status 2
1 1 Setting prohibited
196
CHAPTER 7 INTERRUPT AND TEST FUNCTIONS
Table 7-3. IST1 and IST0 and Interrupt Servicing Status
Processing by CPU
Executes normal
program
Services interrupt
with low or high
priority
Services interrupt
with high priority
User's Manual U10676EJ3V0UM
Interrupt Request That
Can Be Acknowledged
All interrupts can be
acknowledged
Interrupt with high
priority can be ac-
knowledged
Acknowledging all
interrupts is disabled
After Interrupt
Acknowledged
IST1 IST0
0 1
1 0
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