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Instructions Mnemonic
Operand
PUSH
rp
Subrou-
tine/stack
BS
control
POP
rp
BS
Interrupt
EI
control
IE×××
DI
IE×××
Note1
I/O
IN
A, PORT
Note1
OUT
PORT
CPU control HALT
STOP
NOP
Special
SEL
RBn
MBn
Note2, 3
GETI
taddr
Notes
1. To execute an IN/OUT instruction, it is necessary that MBE = 0 or MBE = 1, MBS = 15.
2. The shaded portion is supported only in the MkII mode. All others are supported only in the MkI mode.
3. The TBR and TCALL instructions are the assembler directives for table definition.
CHAPTER 11 INSTRUCTION SET
Machine
Bytes
Cycle
1
1
2
2
1
1
2
2
2
2
2
2
2
2
2
2
2
2
n
, A
2
2
n
2
2
2
2
1
1
2
2
2
2
1
3
1
3
4
3
User's Manual U10676EJ3V0UM
Operation
(SP – 1) (SP – 2) ← rp, SP ← SP – 2
(SP – 1) ← MBS, (SP – 2) ← RBS, SP ← SP–2
rp ← (SP + 1) (SP), SP ← SP + 2
MBS ← (SP + 1), RBS ← (SP), SP ← SP + 2
IME (IPS.3) ← 1
IE××× ← 1
IME (IPS.3) ← 0
IE××× ← 0
A ← PORT
(n = 3, 6, 7, 8)
n
← A
PORT
(n = 3, 6, 8)
n
Set HALT Mode (PCC.2 ← 1)
Set STOP Mode (PCC.3 ← 1)
No Operation
RBS ← n
(n = 0-3)
MBS ← n
(n = 0, 4, 15)
. TBR instruction
← (taddr)
PC
+ (taddr+1)
11-0
3-0
. TCALL instruction
(SP–4) (SP–1) (SP–2) ← PC
(SP–3) ← MBE, RBE, 0, 0
← (taddr)
PC
+ (taddr+1)
11-0
3-0
SP ← SP–4
. Other than TBR and TCALL
instructions
Executes instruction of (taddr)
(taddr+1)
. TBR instruction
← (taddr)
PC
+ (taddr+1)
11-0
3-0
. TCALL instruction
(SP–6) (SP–3) (SP–4) ← PC
(SP–5) ← 0, 0, 0, 0
(SP–2) ← ×, ×, MBE, RBE
← (taddr)
PC
+ (taddr+1)
11-0
3-0
SP ← SP-6
. Other than TBR and TCALL
instructions
Executes instruction of (taddr) (taddr+1)
Addressing
Skip Condition
Area
*10
11-0
Depends on
referenced
instruction
11-0
Depends on
referenced
instruction
247
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