Toshiba DP120F Service Manual page 377

• I/OP-1 GA Signal Table
No. Signal Name
1, 25, 41, 52, +5V
61
2-9 D0-7
10, 34, 42, SG
46, 51, 56,
60, 71
11 IOCS3X
12 IOWRX
13 IORDX
14-16 A1-3
17, 18 HSWC0, 1
19 OPNCU
20, 21 HSWC3, 4
22 OREVB2
23 OREVA2
24 OCI2
26, 27 HSWS0, 1
28, 29 RLADJ22, 1
I: Input O: Output
DP120F/DP125F Circuit Description
(1/3)
Type
- +5V
I/O Data bus
- Signal ground
I I/OP-1 GA chip select signal (active-low)
Select signal for I/OP-1 GA (IC7).
I I/O write signal (active-low)
Writes data to each IC and I/O.
I I/O read signal (active-low)
Reads data into each IC and I/O.
I Address bus
- Signal ground
I Line 2 NCU PBA connection detect signal
(H: Unconnected, L: Connected)
Detects the connection status line 2 of the NCU PBA.
- Signal ground
I Line 2 current reverse current detect signal
Detects the reversed current which flows through line
2 of the NCU PBA.
I Line 2 current detect signal
Detects the current which flows through line 2 of the
NCU PBA.
I Line 2 CI detect signal (H: Undetected, L: Detected)
Detects the ring signal sent from line 2 of the NCU
PBA.
- Unused
O Line 2 return loss adjust control signal
(EU/AU/ASIA models only)
Adjusts the return loss by switching the circuit.
RLADJ21
HIGH
HIGH
I/O: Bidirectional
Functions
RLADJ22
LOW LOW
LOW HIGH
LOW
HIGH
7-68
ASIA
Unused
AU
CTR21 (EU)
March 2000 © TOSHIBA TEC