Motorola PowerQUICC II MPC8280 Series Reference Manual page 990

Freescale Semiconductor, Inc.
MCC Latency and Performance
When MCC FIFO activity starts, the MCC begins to consume CPM bandwidth
immediately upon enabling a TDM which has MCC-related SIRAM programming. This is
regardless of whether a channel is stopped or has the "start condition" programmed in the
RSTATE and TSTATE channel-specific parameters. If a user wishes to spread out CPM and
bus utilization for the MCC channels on a particular TDM, those channels must be
dynamically added to the SIRAM programming in an evenly distributed fashion over
multiple TDM frames.
29-52 MPC8280 PowerQUICC II Family Reference Manual MOTOROLA
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