Motorola PowerQUICC II MPC8280 Series Reference Manual page 1098

ATM Memory Structure
0
Offset + 0x00
Offset + 0x02
Offset + 0x04
Offset + 0x06
Offset + 0x08
Offset + 0x0A
Offset + 0x0C
Offset + 0x0E
Offset + 0x10
Offset + 0x12
Offset + 0x14
Offset + 0x16
Offset + 0x18
Offset + 0x1A
Offset + 0x1C
Offset + 0x1E
Figure 31-54. AAL1 Sequence Number (SN) Protection Table
31.10.7 UNI Statistics Table
The UNI statistics table, shown in Table 31-41, resides in the dual-port RAM and holds
UNI statistics parameters. UNI_STATT_BASE points to the base address of this table.
Each PHY's own table has a starting address given by UNI_STATT_BASE+ PHY# × 8.
1
Offset Name
0x00 UTOPIAE
0x02 MIC_COUNT
0x04 CRC10E_COUNT
0x06 —
Offset from UNI_STATT_BASE+PHY# × 8
1
31-84
Freescale Semiconductor, Inc.
Table 31-41. UNI Statistics Table
Width
Hword Counts cells dropped as a result of UTOPIA/ATM protocol violations.
Violations include the following:
1. Parity error
2. HEC error
3. Invalid timing of RxSOC.
If RxClav is asserted for the selected PHY, RxSOC should be asserted the
cycle immediately following the assertion of RXENB. A violation occurs if
RxSOC is not asserted at that time (i.e. is late or is missing).
Hword Counts misinserted cells dropped as a result of address look-up failure.
Hword Counts cells dropped as a result of CRC10 failure. AAL5-ABR only.
Hword Reserved, should be cleared.
MPC8280 PowerQUICC II Family Reference Manual
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0x0000
0x0007
0x000D
0x000A
0x000E
0x0009
0x0003
0x0004
0x000B
0x000C
0x0006
0x0001
0x0005
0x0002
0x0008
0x000F
Description
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