Motorola PowerQUICC II MPC8280 Series Reference Manual page 1309

60x-Bus
Peripheral Bus
RX_ER
Receiver
RX_DV
Control
COL
UNIT
CRS
RXD[3–0]
36.2 Features
The following is a list of Fast Ethernet key features:
• Support for Fast Ethernet through the MII (media-independent interface)
• Performs MAC (media access control) layer functions of Fast Ethernet and IEEE
802.3x
• Performs framing functions
— Preamble generation and stripping
— Destination address checking
— CRC generation and checking
— Automatic padding of short frames on transmit
— Framing error (dribbling bits) handling
• Full collision support
— Enforces the collision (jamming and TX_ER assertion)
— Truncated binary exponential backoff algorithm for random wait
— Two nonaggressive backoff modes
— Automatic frame retransmission (until retry limit is reached)
— Automatic discard of incoming collided frames
— Delay transmission of new frames for specified interframe gap
• Bit rates up to 100 Mbps
MOTOROLA
Freescale Semiconductor, Inc.
Control
Registers
Receive Transmit
Data
FIFO
Shifter
Figure 36-2. Ethernet Block Diagram
Chapter 36. Fast Ethernet Controller
For More Information On This Product,
Go to: www.freescale.com
Generator
Internal Clocks
Transmitter
Data Control
FIFO
Unit
TXD[3–0]
Shifter
Features
Slot Time
And Defer
Counter
RX_CLK
Clock
TX_CLK
TX_ER
TX_EN
COL
CRS
36-3