Motorola PowerQUICC II MPC8280 Series Reference Manual page 1431

Record bit. Bit 31 (or the Rc bit) in the instruction encoding. When set, it
Register indirect addressing. A form of addressing that specifies one GPR
Register indirect with immediate index addressing. A form of addressing
Register indirect with index addressing. A form of addressing that
Reservation. The processor establishes a reservation on a cache block of
Reserved field. In a register, a reserved field is one that is not assigned a
RISC (reduced instruction set computing). An architecture characterized
S
Scalability. The capability of an architecture to generate implementations
Scan chain. The peripheral buffers of a device, linked in JTAG test mode,
Set (v). To write a nonzero value to a bit or bit field; the opposite of clear. The
Set (n). A subdivision of a cache. Cacheable data can be stored in a given
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updates the condition register (CR) to reflect the result of the
operation.
that contains the address for the load or store.
that specifies an immediate value to be added to the contents of a
specified GPR to form the target address for the load or store.
specifies that the contents of two GPRs be added together to yield the
target address for the load or store.
memory space when it executes an lwarx instruction to read a
memory semaphore into a GPR.
function. A reserved field may be a single bit. The handling of
reserved bits is implementation-dependent. Software is permitted to
write any value to such a bit. A subsequent reading of the bit returns
0 if the value last written to the bit was 0 and returns an undefined
value (0 or 1) otherwise.
by fixed-length instructions with nonoverlapping functionality and
by a separate set of load and store instructions that perform memory
accesses.
specific for a wide range of purposes, and in particular
implementations of
functionality than at present, while maintaining compatibility with
current implementations.
which are addressed in a shift-register fashion.
term 'set' may also be used to describe updating of a bit or bit field.
location in any one of the sets, typically corresponding to its
Glossary of Terms and Abbreviations
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significantly greater performance or
Glossary-9