Motorola PowerQUICC II MPC8280 Series Reference Manual page 1288

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Features
35.1 Features
Primary features of the TC layer include the following:
• Eight TDM channels routed in hardware to eight TC layer blocks
— Protocol-specific overhead bits may be discarded or routed to other controllers
by the SI
— Performing ATM TC layer functions (according to ITU-T I.432)
— Transmit (Tx) updates are as follows:
– Cell HEC generation
– Payload scrambling using self synchronizing scrambler (programmable by the
user)
– Coset generation (programmable by the user)
– Cell rate by inserting idle cells
— Receive (Rx) updates are as follows:
– Cell delineation using bit by bit HEC checking and programmable ALPHA
and DELTA parameters for the delineation state machine
– Payload descrambling using self synchronizing scrambler (programmable by
the user)
– Coset removing (programmable by the user)
– Filtering idle/unassigned cells (programmable by the user)
– Performing HEC error detection and single bit error correction
(programmable by the user)
– Generating loss of cell delineation status/interrupt (LOC / LCD)
• Operates with FCC2 (UTOPIA 8)
• Serial loop back mode
• Cell echo mode
• Supports both FCC transmit modes:
— External rate mode—Idle cells are generated by the FCC (microcode) to control
data rate
— Internal rate mode (sub-rate)—FCC transfers only the data cells using the
required data rate. The TC layer generates idle/unassigned cells to maintain the
line bit rate
• Supports the TC layer and PMD (physical medium dependent) WIRE interface
(according to the ATM-Forum af-phy-0063.000)
35-2
Freescale Semiconductor, Inc.
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA

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