Motorola PowerQUICC II MPC8280 Series Reference Manual page 1068

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ATM Memory Structure
Table 31-20. AAL0-Specific RCT Field Descriptions (continued)
Offset
Bits
Name
0x18
0–7
8
RXBM
9–15
31.10.2.2.5
AAL1 CES Protocol-Specific RCT
Refer to Section 32.9.1.1, "AAL1 CES Protocol-Specific RCT."
31.10.2.2.6
AAL2 Protocol-Specific RCT
Refer to Section 33.4.4.1, "AAL2 Protocol-Specific RCT."
31.10.2.3
Transmit Connection Table (TCT)
Figure 31-30 shows the format of an TCT entry.
0
1
Offset + 0x00
Offset + 0x02
INF
Offset + 0x04
Offset + 0x06
Offset + 0x08
Offset + 0x0A
Offset + 0x0C
Offset + 0x0E
Offset + 0x10
• For AAL5,Section 31.10.2.3.1, "AAL5 Protocol-Specific TCT."
Offset + 0x12
• For AAL2, Section 33.3.5.1, "AAL2 Protocol-Specific TCT."
• For AAL1, Section 31.10.2.3.2, "AAL1 Protocol-Specific TCT."
Offset + 0x14
• For AAL1 CES, Section 32.9.2.1, "AAL1 CES Protocol-Specific TCT"
• For AAL0, Section 31.10.2.3.3, "AAL0 Protocol-Specific TCT."
Offset + 0x16
Offset + 0x18
Offset + 0x1a
Offset + 0x1C
Offset + 0x1E
Figure 31-30. Transmit Connection Table (TCT) Entry
31-54
Freescale Semiconductor, Inc.
Reserved, should be cleared.
Receive buffer interrupt mask
0 The receive buffer event of this channel is masked. (The RXB event is not sent to the
interrupt queue when receive buffers are closed.)
1 The receive buffer event of this channel is enabled.
Reserved, should be cleared.
2
3
4
5
6
GBL
BO
DTB BIB AVCF
Tx Data Buffer Pointer (TXDBPTR)
Rate Remainder
APC Linked Channel (APCLC)
ATM Cell Header (VPI,VCI,PTI,CLP)
PMT
TBD_BASE
MPC8280 PowerQUICC II Family Reference Manual
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Description
7
8
9
10
ATT
TBDCNT
TBD_OFFSET
PCR Fraction
PCR
Protocol Specific
TBD_BASE
11
12
13
14
15
CPUU VCON
INTQ
ABRF
AAL
BNM
STPT IMK
PM
MOTOROLA

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