Motorola PowerQUICC II MPC8280 Series Reference Manual page 1136

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ATM-to-TDM Adaptive Slip Control
Data I/F
MCC
T1/E1 framer
UTOPIA
ATM
interface
Receive
Shown in
CAS routing
Figure 1-10
table
CAS serial I/F
MCC
T1/E1 framer
The CAS block is read from the internal RAM by the MCC. The MCC transmitter
continuously reads the signaling information from one of the four outgoing internal CAS
blocks and writes it transparently into the external framer. Each byte in the CAS block
contains one nibble of valid CAS information (depicted in Figure 32-8).
Note that the buffer data size should not include the CAS octets.
32.4.7.3.1 CAS Updates Using the Core (Optional)
To avoid using another TDM dedicated to CAS information, the user can use a parallel
interface controlled by the core to deliver the outgoing CAS block to the framer. In this
case, the ATM receiver should be programmed to operate in core CAS modify mode
RCT[CCASM=1] (and RCT[CASM=1]). In this mode, the CP adds an entry to the ATM
interrupt queue and sets the appropriate sticky bit in OCASSR each time an AAL1 cell is
received with new signaling information (one or more signaling nibble has changed). (See
Section 32.10, "Outgoing CAS Status Register (OCASSR).") A core interrupt service
routine can then write the updated outgoing CAS block to the framer.
Note to avoid additional latency, the interrupt queue assigned to this connection should
have a global interrupt threshold of one. See the INT_ICNT parameter discussed in
Section 31.11.3, "Interrupt Queue Parameter Tables."
32.5 ATM-to-TDM Adaptive Slip Control
Two types of slip can occur in ATM-to-TDM operation: overrun and underrun. The two
cases are handled by the MCC and ATM controller automatically without requiring CPU
intervention.
32-16
Freescale Semiconductor, Inc.
MCC
Tx pointer
Tx
ATM
Rx pointer
Rx
Tx
Note: With CAS only 4 T1/E1 are supported.
Figure 32-13. CAS Flow ATM-to-TDM
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
BD table per VC
EOSF
EOSF
Outgoing CAS block per trunk
(internal RAM)
Buffer 1
Super
frame
Buffer 2
Buffer 3
Super
frame
Buffer 4
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