Command Register Upper Byte (Cmrh); Table 13.3.1A Transmission Mode - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16-bit microcontrollers
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13.3 Registers and Register Details

13.3.1 Command register upper byte (CMRH)

Command register upper byte (CMRH)
Address: 000077
H
Read/write
Initial value
[bits 15 and 14] MD1, MD0 (Mode select):
These bits are used to select the IEBus operation mode.
MD1
0
0
1
1
[bit 13] PCOM (Communication enable):
This bit is used to enable IEBus communication. When PCOM is written '1', the COM flag in status register
(STRH) is set and then the communication is enabled. When PCOM is written '0', the communication is
ended. Please set this bit to '1' if the COM flag in the status register is '0'.
[bit 12] RIE (Receive interrupt enable):
This bit controls receive interrupt as described below.
0
1
The receive interrupt is occurred under the following condition:
The eight byte Receive data buffer (RDB) is full.
Data reception is finished normally.
The communication has ended without receiving the number of data specified by telegraph length field
in one communication frame.
When arbitration lost, the unit cannot be selected as slave unit.
146
Chapter 13: IE Bus
15
14
13
MD1
MD0
PCOM
(R/W)
(R/W)
(R/W)
(0)
(0)
(0)

Table 13.3.1a Transmission mode

MD0
Operation mode
0
Mode 0
1
Mode 1
0
Mode 2
1
Setting inhibited
Receive interrupt disabled
Receive interrupt enabled
12
11
10
RIE
TIE
GOTM
(R/W)
(R/W)
(R/W)
(0)
(0)
(0)
9
8
Bit Number
CMRH
Reserved
GOTS
(R/W)
(R/W)
(0)
(X)
MB90580 Series

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