Operations - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16.4 Operations

16.4 Operations
The A/D converter operates in the sequential compare format, and has a 8-bit resolution.
Since the A/D converter has only one register (8 bits) for storing the conversion result, the conversion data
registers (ADCR0) are updated each time conversion is completed. Thus, the A/D converter must not be
used alone for continuous conversion. Use the F
verted data to memory while conversion is in progress.
The operation modes are explained below.
(1) Single mode
In this mode, the converter sequentially converts the analog inputs specified with the ANS and ANE
bits. The converter stops operation after the conversion is completed for the end channel specified with
the ANE bits. If the start and end channels are the same (ANS=ANE), conversion is performed only for
one channel.
Example:
ANS = 0 0 0 , ANE = 0 1 1
Start → AN0 → AN1 → AN2 → AN3 → End
ANS = 0 1 0 , ANE = 0 1 0
Start → AN2 → End
(2) Continuous mode
In this mode, the converter sequentially converts the analog inputs specified with the ANS and ANE
bits. After the conversion is completed for the end channel specified with the ANE bits, conversion is
repeated from the analog inputs of the ANS. If the start and end channels are the same (ANS=ANE),
conversion for one channel is repeated.
Example:
ANS = 0 0 0 , ANE = 0 1 1
Start → AN0 → AN1 → AN2 → AN3 → AN0
ANS = 0 1 0 , ANE = 0 1 0
Start → AN2 → AN2 → AN2
In continuous mode, conversion is repeated until '0' is written to the BUSY bit. (Writing '0' to the BUSY
bit forces the operation to end.) If the operation is terminated forcibly, conversion stops before conver-
sion is completed. (Upon a forced termination, the conversion register stores the previous data that has
been converted completely.)
228 Chapter 16: A/D Converter
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MB90580 Series