Table B.2D Number Of Execution Cycles For Each Form Of Addressing; Table B.2E Compensation Values For Number Of Cycles Used To Calculate Number Of Actual Cycles - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

B.2 Instruction Set

Table B.2d Number of Execution Cycles for Each Form of Addressing

Code
00
to
07
08
to
0B
0C
to
0F
10
to
17
18
to
1B
1C
1D
1E
1F
Note: "(a)" is used in the "~" (number of cycles) column, column B (compensation value) and in the
detailed instruction rules in the Table of Instructions.

Table B.2e Compensation Values for Number of Cycles Used to Calculate Number of Actual Cycles

Operand
Internal register
Internal RAM even address
Internal RAM odd address
Even address on external data bus (16 bits)
Odd address on external data bus (16 bits)
External data bus (8 bits)
Note: "(b)", "(c)", and "(d)" are used in the "~" (number of cycles) column, column B (compensation value)
and in the detailed instruction rules in the Table of Instructions.
When the external data bus is used, it is necessary to add in the number of weighted cycles used
for ready input and automatic ready.
318 APPENDIX B: Instructions
Number of execution
Operand
cycles for each form of
Ri
Listed in Table of
RWi
RLi
@RWj
@RWj+
@RWi+disp8
@RWj+disp16
@RW0+RW7
@RW1+RW7
@PC+disp16
addr16
Cycles
+0
+0
+0
+1
+1
+1
(a)
Number of accesses for
each form of addressing
addressing
Instructions
2
4
2
2
4
4
2
1
(b) byte
Access
Cycles
cycles
1 +0
1 +0
1 +2
1 +1
1 +4
1 +4
Listed in Table of
Instructions
1
2
1
1
2
2
0
0
(c) word (d) long
Access
Cycles
cycles
1 +0
1 +0
2 +4
1 +2
2 +8
2 +8
MB90580 Series
Access
cycles
2
2
4
2
4
4