Figure 14.2B 8-Bit Ppg Ch1 Block Diagram - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

ch0 borrow
Time base counter output
512-division of main clock
L/H selection
MB90580 Series
Peripheral clock 16-division
Peripheral clock 8-division
Peripheral clock 4-division
Peripheral clock 2-division
Peripheral clock
PPG1
Output latch
Invert
Count clock
selection
PCNT
(down counter)
Reload
L/H selector
PRLL1
PRLH1

Figure 14.2b 8-bit PPG ch1 block diagram

PPG0 output enable
UART
Clear
PEN1
S
R Q
PRLBH1
PIE
PUF
PPGC1
(Operation mode control)
14.2 Block Diagram
PPG1
IRQ
L data bus
H data bus
Chapter 14: 8/16-Bit PPG 193