Table B.2.1O Other Control Instructions (Byte/Word/Long-Word) (36 Instructions) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16-bit microcontrollers
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Table B.2.1o Other Control Instructions (Byte/Word/Long-Word) (36 Instructions)

Mnemonic
#
PUSHW
A
1
PUSHW
AH
1
PUSHW
PS
1
PUSHW
rlst
2
POPW
A
1
POPW
AH
1
POPW
PS
1
POPW
rlst
2
JCTX
@A
1
AND
CCR,#imm8
2
OR
CCR,#imm8
2
MOV
RP,#imm8
2
MOV
ILM,#imm8
2
MOVEA
RWi,ear
2
MOVEA
RWi,eam
2+
MOVEA
A,ear
2
MOVEA
A,eam
2+
ADDSP
#imm8
2
ADDSP
#imm16
3
MOV
A,brgl
2
MOV
brg2,A
2
NOP
1
ADB
1
DTB
1
PCB
1
SPB
1
NCC
1
CMR
1
*1:
PCB, ADB, SSB, USB, and SPB: ...1 cycle
DTB, DPR: ......................................2 cycles
*2:
7 + 3 × (pop count) + 2 × (last register number to be popped), 7 when RLST = 0
*3:
29 + 3 × (pop count) - 3 × (last register number to be popped), 8 when RLST = 0
*4:
Pop count x (c), or push count x (c)
Note: For an explanation of "(a)" to "(d)" in the colunm "B", see Table B.2d and Table B.2e.
MB90580 Series
~
RG
B
word (SP) ← (SP) -2, ((SP)) ← (A)
4
0
(c)
word (SP) ← (SP) -2, ((SP)) ← (AH)
4
0
(c)
word (SP) ← (SP) -2, ((SP)) ← (PS)
4
0
(c)
(SP) ← (SP) - 2n, ((SP)) ← (rlst)
*3
+&
*4
word (A) ← ((SP)), (SP) ← (SP) + 2
3
0
(c)
word (AH) ← ((SP)), (SP) ← (SP) + 2
3
0
(c)
word (PS) ← ((SP)), (SP) ← (SP) + 2
4
0
(c)
(rlst) ← ((SP)), (SP) ← (SP)
*2
+&
*4
14
0
6×(c)
Context switching instruction
byte (CCR) ← (CCR) and imm8
3
0
0
byte (CCR) ← (CCR) or imm8
3
0
0
byte (RP) ← imm8
2
0
0
byte (ILM) ← imm8
2
0
0
word (RWi) ← ear
3
1
0
word (RWi) ← eam
2+(a)
1
0
word (A) ← ear
1
0
0
word (A) ← eam
1+(a)
0
0
word (SP) ← ext(imm8)
3
0
0
word (SP) ← imm16
3
0
0
byte (A) ← (brg1)
*1
0
0
byte (brg2) ← (A)
1
0
0
1
0
0
No operation
1
0
0
Prefix code for AD space access
1
0
0
Prefix code for DT space access
1
0
0
Prefix code for PC space access
1
0
0
Prefix code for SP space access
1
0
0
Prefix code for flag unchange setting
1
0
0
Prefix for common register banks
Operation
LH AH
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Z
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B.2 Instruction Set
I
S
T
N
Z
V
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APPENDIX B: Instructions
C
RMW
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331

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