Document Revision History For Intel Acceleration Stack Quick Start Guide - Intel D5005 Quick Start Manual

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UG-20202 | 2019.08.05
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8. Document Revision History for Intel Acceleration Stack
Quick Start Guide
Document Version
Intel Acceleration Stack Version
2019.08.05
2019.02.01
Intel Corporation. All rights reserved. Agilex, Altera, Arria, Cyclone, Enpirion, Intel, the Intel logo, MAX, Nios,
Quartus and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or
other countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
2.0
(supported with Intel Quartus
Prime Pro Edition 18.1.2 version)
2.0 Pre Beta
(supported with Intel Quartus
Prime Pro Edition 18.1 version)
Changes
Added the server and connector information in table:
System Requirements for the Intel FPGA PAC D5005.
Added new steps in section:
— Installing Red Hat Enterprise Linux version 7.6
— Installing the Intel Acceleration Stack Runtime Package
on the Host Machine
— Installing the Intel Acceleration Stack Development
Package on the Host Machine
— Updating the FIM and BMC using the fpgaflash Tool
Updated OPAE package version number
Initial release.
ISO
9001:2015
Registered

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