Pipelined Instruction Execution - Intel i86W Manual

Instruction
i
Instruction
1+1
Instruction
1+2
Instruction
1+3
Instruction
1+4
Instruction
1+5
r
r
r
r
r
r
FLOATING-POINT INSTRUCTIONS
StagG 1
results (status)
i
(s)
"\
i + 1
(s)
' "
i +2
(s)
"\
i +3
(5)
' "
i + 4
(s)
\,
i +5
(s)
r
r
r
r
r
Stage 2
results (status)
Clockm
Clock m
+
1 ' "
i
(s)
Clock m
+
2 ' "
i + 1
(s)
Clock m
+
3 " \
i+ 2
(s)
Clock m
+
4 " \
i +3
(8)
Clock m
+
5 " \
i + 4
(6)
r
r
r
r
Stage 3
results (status)
i
i + 1
i+ 2
i + 3
Figure 6-1. Pipelined Instruction Execution
6-3
s
~
s
~
8
fdeat
+3 I
fdeat
1+4
~
6
fd.at
1+5
240329i