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TRAPS AND INTERRUPTS
7.2.3.2 SETTING KNF
The KNF bit of
psr
should be set if the trapped instruction is a floating-point instruction
that should not be reexecuted; otherwise, KNF is left unchanged. Floating-point instruc-
tions should not be reexecuted under the following conditions:
• The trap was caused in dual-instruction mode by a data-access fault or an
intovr
instruction and there are no other trap conditions. In this case, the floating-point
instruction has already been executed.
• The trap was caused by a source exception on any floating-point instruction (except
when a
pfgt, pfle,
or
pfeq
follows a conditional branch, as already explained in
Section 7.2.3.1). The trap handler determines the result that corresponds to the
exceptional inputs; therefore, the instruction should not be reexecuted.
7.3 INSTRUCTION FAULT
This fault is caused by any of the following conditions. In all cases the processor sets the
IT bit before entering the trap handler.
1.
By the
trap
instruction. Refer to the
trap
instruction in Chapter 5.
2. By the
intovr
instruction. The trap occurs only if OF in
epsr
is set when
intovr
is
executed. The trap handler should clear OF before returning. Refer to the
intovr
instruction in Chapter 5.
3. By the lack of an
unlock
instruction (and subsequent load or store) within 30-33
instructions of a
lock.
In this case IL is also set. When the trap handler finds IL set,
it should scan backwards for the
lock
instruction and restart at that point. The
absence of a
lock
instruction within 30-33 instructions of the trap indicates a pro-
gramming error. Refer to the
lock
instruction in Chapter 5.
Note that
trap
and
intovr
should not be used within a locked sequence; otherwise, it
would not be possible to distinguish among the above cases.
7.4 FLOATING-POINT FAULT
The floating-point faults of the i860 microprocessor support the floating-point excep-
tions defined by the IEEE standard as well as some other useful classes of exceptions.
The i860 microprocessor divides these into two classes:
1.
Source exceptions. This class includes:
• All the invalid operations defined by the IEEE standard (including operations on
signaling NaNs).
• Division by zero.
• Operations on quiet NaNs, denormals and infinities. (These data types are imple-
mented by software.)
7-5
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