Intel i86W Manual page 144

TRAPS AND INTERRUPTS
Reset code must initialize the floating-point pipeline states to zero, using dummy
pfadd,
pfmul, pfiadd
instructions. Floating-point traps must be disabled to ensure that no
spurious floating-point traps are generated.
After a RESET the i860 microprocessor starts execution at supervisor level (U
=
0).
Before branching to the first user-level instruction, the RESET trap handler or subse-
quent initialization code has to set PU and a trap bit so that an indirect branch instruc-
tion will copy PU to U, thereby changing to user level.
7.9 PIPELINE PREEMPTION
Each of the four pipelines (adder, multiplier, load, graphics) contains state information.
The pipeline state must be saved when a process is preempted or when a trap handler
performs pipelined operations using the same pipeline. The state must be restored when
resuming the interrupted code.
7.9.1 Floating-Point Pipelines
The floating-point pipeline state consists of the following items:
1. The current contents of the floating-point status register
fsr
(including the third-
stage result status).
2. Unstored results from the first, second, and third stages. The number of stages that
exist in the multiplier pipeline depends on the sizes of the operands that occupy the
pipeline. The MRP bit of
fsr
helps determine how many stages are in the multiplier
pipeline.
3. The result-status bits for the first two stages.
4. The contents of the KR, KI, and T registers.
7.9.2 Load Pipeline
The pipeline state for
pfld
instructions can be saved by performing three
pfld
instructions
to a dummy address. Thus the pipeline is advanced three stages, causing the last three
real operands to be stored from the pipeline into registers that are then saved in some
memory area. The size of each saved value is indicated by the value of the LRP bit of the
fsr.
Note that the load pipeline must be saved
before
changing the BE bit.
The load pipeline can be restored performing three
pfld
instructions using the memory
addresses of the saved values. The pipeline will then contain the same three values it
held before the preemption.
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