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INSTRUCTION FORMAT AND ENCODING
REG-Format Instructions
OPCODE/I
OPCODE/I
GENERAL FORMAT
NULL/IMMEDIATE/OFFSET
16-BIT IMMEDIATE VARIANT (EXCEPT BTE AND BTNE)
ST, BLA, BTE, AND BLUE
15
IMMEDIATE CONSTANT
OR ADDRESS OFFSET
10
OFFSET LOW
BTE AND BTNE WITH 5-BIT IMMEDIATE
OFFSET LOW
o
o
240329i
The
src2
field selects one of the 32 integer registers (most instructions) or one of the
control registers (
st.e
and
Id.e).
Dest
selects one of the 32 integer registers (most instruc-
tions) or floating-point registers
(fld, fst, pfld, pst, ixfr).
For instructions where
srcl
is
optionally an immediate constant or address offset, bit 26 of the opcode (I-bit) indicates
whether
srcl
is immediate.
If
bit 26 is clear, an integer register is used; if bit 26 is set,
srcl
is contained in the low-order 16 bits, except for
bte
and
btne
instructions. For
bte
and
btne,
the five-bit immediate constant is contained in the
srcl
field. For
st, bte, btne,
and
bla,
the upper five bits of the
offset
or
broffset
are contained in the
dest
field instead
of
srcl,
and the lower 11 bits of
offset
are the lower 11 bits of the instruction.
For
Id
and
st,
bits 28 and zero determine operand size as follows:
Bit 28
Bit 0
Operand Size
0
0
8-bits
0
1
a-bits
1
0
16-bits
1
1
32-bits
B-2
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