Oki B 4100 Maintenance Manual page 403

A3.2 M17 Circuit Diagram (for OKIFAX 5000 series)
A3.2.1 M17 Circuit Diagram (Page 1/17)
1. Block diagram
The circuit diagram shown on page 1/17 consists of a CPU, crystal oscillator circuit and reset
signal generator.
Figure A3.2.1 shows the block diagram of CPU and the peripheral circuits.
2. Function
1) Crystal oscillator circuit
X1 is a 20 MHz crystal ocillator. The output wave is fed to the CPU through pins 73 and
74.
CLK (20MHz) signal output from pin 71 is used as the system clock and output to IC2
(IOGA3: input/output gate array) IC20 (IEXCEED) and CTR board.
2) CPU
CPU controls the following functions in addition to the basic processor.
• Scanning control
• Picture processing control
• Printing control
• Serial communication interface (SCI)
• DMA (direct memory access) control
• Interrupt procedure control
• A/D converter
• Programmable pattern control
• 16 bit integrated timer pulse unit (ITU)
• Timing pattern control (TPC)
Address bus
Initial Reset Circuit
+5 V
40055101TH Rev.4
CPU
Port C
IC1
RES
POWRDY-N
X1
XTAL
20 MHz
EXTAL
Figure A3.2.1 Related Signals of CPU
Data/Address bus
Port A
Port B
CK
CK (20 MHz)
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