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5FF
(1) Paper deck motor drive circuits
8
CPU
IC8
5 V DC
1
R3
16
2
The following is a description of the paper deck motor 1 drive circuit. Paper deck motors 1 and 2 are identical.
When pin 8 of the CPU IC8 goes low, transistor Q1 is turned on causing paper deck motor 1 (PDM1) to rotate. When
transistor Q1 is turned off, paper deck motor 1 (PDM1) stops. A brake circuit ensures the prompt stopping of the motor as
follows.
When transistor Q1 turns off, transistor Q7 turns on, supplying 24 V DC to CN7-13 thereby preventing paper deck motor 1
(PDM1) from rotating further under momentum.
To prevent the cassette lift from being raised past its limit, an overcurrent lock detection circuit checks for the overcurrent
that would occur when paper deck motor 1 (PDM1) locks. The current from paper deck motor 1 (PDM1) into transistor Q1
is converted to a voltage by resistor R46. This voltage is input to pin 5 of comparator IC7.2. If this voltage is higher than the
reference at pin 4, 5 V DC is input to pin 16 of CPU IC8. If it is lower, 0 V is input to pin 16. Overcurrent of paper deck motor
1 (PDM1) causes the voltage at pin 5 of IC7.2 to become higher than that at pin 4. This generates 5 V DC at pin 16 of CPU
IC8, which detects overcurrent. If overcurrent lasts more than 1 s, paper deck motor 1 (PDM1) failure is determined, and pin
8 of CPU IC8 outputs 5 V DC, turning paper deck motor 1 (PDM1) off.
2-3-2
1
B
24 V DC
1
R52
2
1
R53
4
2
–
2
IC7.2
5
+
1
1
R49
C17
2
2
PGND
Figure 2-3-2 Paper deck motor 1 drive circuit
5 V DC
24 V DC
E
3
1
R1
Q3
2
C 2
1
R14
2
1
C
2
R20
2
3
Q1
B
SGND
E
1
R40
R38
2
1
2
1
1
1
C2
R46
2
2
PGND
PGND
PDMPCB
24 V DC
1
R32
C 2
K
1
2
3
Q7
D1
B
CN7-12
A
2
E 1
D3
1
CN7-13
2
R97
PDM1
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