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Table 6-6. Runtime checkpoint codes (Continued)
Checkpoint
code
9Dh
Coprocessor initialized. Performing any required initialization after the coprocessor
test next.
9Eh
Initialization after the coprocessor test completes. Checking the extended keyboard,
keyboard ID, and Num Lock key next. Issuing the keyboard ID command next.
A2h
Displaying any soft errors next.
A3h
The soft error display has completed. Setting the keyboard typematic rate next.
A4h
The keyboard typematic rate is set. Programming the memory wait states next.
A5h
Memory wait state programming is over. Clearing the screen and enabling parity
and the NMI next.
A7h
NMI and parity enabled. Performing any initialization required before passing
control to the adaptor ROM at E000 next.
A8h
Initialization before passing control to the adaptor ROM at E000h completed.
Passing control to the adaptor ROM at E000h next.
A9h
Returned from adaptor ROM at E000h control. Performing any initialization
required after the E000 option ROM had control next.
AAh
Initialization after E000 option ROM control has completed. Displaying the system
configuration next.
ABh
Building the multiprocessor table, if necessary.
ACh
Uncompressing the DMI data and initializing DMI POST next.
B0h
The system configuration is displayed.
B1h
Copying any code to specific areas.
00h
Code copying to specific areas is complete. Passing control to INT 19h boot loader
next.
Bus checkpoint codes
The system BIOS passes control to different buses at various checkpoints, see
Table 6-7 for a description of the bus checkpoint codes.
POST checkpoint codes
Description
6
6-15
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