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Power On Self-Tests
Runtime checkpoint codes
The runtime checkpoint codes are listed in order of execution in Table 6-6.
These codes are uncompressed in F0000h shadow RAM.
Checkpoint
code
03h
The NMI is disabled. Next, checking for a soft reset or a power on condition.
05h
The BIOS stack has been built. Next, disabling cache memory.
6
06h
Uncompressing the POST code next.
07h
Next, initializing the CPU and the CPU data area.
08h
The CMOS checksum calculation is performed next.
0Bh
Next, performing any required initialization before the keyboard BAT command is
issued.
0Ch
The keyboard controller input buffer is free. Next, issuing the BAT command to the
keyboard controller.
0Eh
The keyboard controller BAT command result is verified. Next, performing any
necessary initialization after the keyboard controller BAT command test.
0Fh
The initialization after the keyboard controller BAT command test is carried out.
The keyboard command byte is written next.
10h
The keyboard controller command byte is written. Next, issuing the pin 23 and 24
blocking and unblocking commands.
11h
Next, checking if the <End> or <Ins> keys were pressed during power on.
Initializing CMOS RAM if the initialize CMOS RAM in every boot AMIBIOS
POST option was set in AMIBCP or the <End> key was pressed.
12h
Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2.
13h
The video display is disabled. Port B has initialized. Next, initializing the chipset.
14h
The 8254 timer test will begin next.
19h
The 8254 timer test is over. Starting the memory refresh test next.
1Ah
The memory refresh line is toggling. Checking the 15 second on/off time next.
23h
Reading the 8042 input port and disabling the MEGAKEY Green PC feature next.
Making the BIOS code segment writable and performing any necessary
configuration before initializing the interrupt vectors.
6-10
Table 6-6. Runtime checkpoint codes
Description
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