Serial Communications; Uartx Control And Status Registers - Analog Devices ADSP-BF535 Blackfin Hardware Reference Manual

Serial Communications

Serial Communications
The UART follows an asynchronous serial communication protocol with
these options:
• 5 – 8 data bits
• 1, 1½, or 2 stop bits
• None, even, or odd parity
• Baud rate =
frequency and Divisor can be a value from 1 to 65536
All data words require a start bit and at least one stop bit. With the
optional parity bit, this creates a 7- to 12-bit range for each word. Data is
always transmitted and received least significant bit (LSB) first.
Figure 12-1 shows a typical physical bit stream measured on the TX pin.
Start bit
Figure 12-1. Bit Stream on the TX Pin

UARTx Control and Status Registers


The ADSP-BF535 processor provides a set of PC-style industry
standard control and status registers for each UART. These MMRs
are byte-wide registers that are accessed as 16-bit words with the
most significant byte zero filled.
12-2
SCLK/(16 x Divisor)
Data bits
D0 D1 D2 D3 D4 D5 D6 D7
LSB
ADSP-BF535 Blackfin Processor Hardware Reference
, where
SCLK
Stop bit(s)
Parity Bit (optional, odd or even)
is the system clock