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RZ (Return to Zero modulation).
A binary encoding scheme in which two signal pulses are used for every
bit. A zero (0) is represented by a change from the low voltage level to the
high voltage level; a one (1) is represented by a change from the high volt-
age level to the low voltage level. A return to a reference (zero) voltage is
made between encoded bits.
RZI (Return to Zero Inverted modulation).
A binary encoding scheme in which two signal pulses are used for every
bit. A one (1) is represented by a change from the low voltage level to the
high voltage level; a zero (0) is represented by a change from the high volt-
age level to the low voltage level. A return to a reference (zero) voltage is
made between encoded bits.
saturation (ALU saturation mode).
A state in which all positive fixed-point overflows return the maximum
positive fixed-point number, and all negative overflows return the maxi-
mum negative number.
SBIU.
See System Bus Interface Unit.
SDRAM (Synchronous Dynamic Random Access Memory).
A form of DRAM that includes a clock signal with its other control sig-
nals. This clock signal allows SDRAM devices to support "burst" access
modes that clock out a series of successive bits.
SDRAM banks.
Four regions of memory that can be configured to be 16 MB, 32 MB,
64 MB, or 128 MB and are selected by the
pins. Each bank can
SMS[3:0]
be selected to be either all 32 bits wide or all 16 bits wide.
ADSP-BF535 Blackfin Processor Hardware Reference
G-23
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