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When the
BMODE
bit is set, the core begins fetching instructions from address 0x2000 0000
(the beginning of ASYNC Bank 0).
Core Only Software Reset
A software reset is initiated by executing the
ting the Software Reset (
(
) via emulation software through the JTAG port. (
DBGCTL
visible to the memory map).
A Core Only Software reset affects only the state of the core. Note the sys-
tem resources may be in an undetermined or even unreliable state,
depending on the system activity during the reset period.
Booting Methods
The internal boot ROM includes a small boot kernel that can either be
bypassed or used to load user code from an external memory device, as
defined in
Table 4-10 on page
pin state at reset to identify the download source (see
BMODE[2:0]
Table 4-7 on page
execute from 16-bit wide external memory at address 0x2000 0000
(ASYNC Bank 0).
Several boot methods are available in which user code can be loaded from
an external memory device. For these modes, the boot kernel sets up the
selected peripheral based on the
For each boot mode, user code read in from the memory device is placed
at the starting location of L2 memory (0xF000 0000). The boot kernel
terminates the boot process with a jump to the start of the L2 memory
space. The processor then begins execution from this address.
ADSP-BF535 Blackfin Processor Hardware Reference
pins are set to b#000 and the No Boot on Software Reset
) bit in the core Debug Control register
SYSRST
4-37. The boot kernel reads the
4-22). When in Bypass mode, the processor is set to
BMODE[0:2]
Operating Modes and States
instruction or by set-
RAISE 1
pin settings.
is not
DBGCTL
3-17
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