Communications Register - Analog Devices AD7194 Manual

COMMUNICATIONS REGISTER

RS2, RS1, RS0 = 000
The communications register is an 8-bit write-only register. All
communications to the part must start with a write operation to
the communications register. The data written to the communi-
cations register determine whether the next operation is a read
or write operation and in which register this operation occurs. For
read or write operations, when the subsequent read or write oper-
ation to the selected register is complete, the interface returns to
where it expects a write operation to the communications register.
This is the default state of the interface and, on power-up or after
CR7
WEN(0)
Table 16. Communications Register (CR) Bit Designations
Bit Location
CR7
CR6
CR5 to CR3
CR2
CR1 to CR0
Table 17. Register Selection
RS2 RS1
0 0
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
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CR6 CR5
R/W(0) RS2(0)
Bit Name Description
WEN Write enable bit. For a write to the communications register to occur, 0 must be written to this bit. If a 1 is
the first bit written, the part does not clock onto subsequent bits in the register; rather, it stays at this bit
location until a 0 is written to this bit. After a 0 is written to the WEN bit, the next seven bits are loaded to
the communications register. Idling the DIN pin high between data transfers minimizes the effects of
spurious SCLK pulses on the serial interface.
R/W 0 in this bit location indicates that the next operation is a write to a specified register.
1 in this bit position indicates that the next operation is a read from the designated register.
RS2 to RS0 Register address bits. These address bits are used to select which registers of the ADC are selected during
the serial interface communication (see Table 17).
CREAD Continuous read of the data register. When this bit is set to 1 (and the data register is selected), the serial
interface is configured so that the data register can be continuously read; that is, the contents of the data
register are automatically placed on the DOUT pin when the SCLK pulses are applied after the RDY pin
goes low to indicate that a conversion is complete. The communications register does not have to be
written to for subsequent data reads. To enable continuous read, Instruction 01011100 must be written to
the communications register. To disable continuous read, Instruction 01011000 must be written to the
communications register while the RDY pin is low. While continuous read is enabled, the ADC monitors
activity on the DIN line so that it can receive the instruction to disable continuous read. Additionally, a
reset occurs if 40 consecutive 1s occur on DIN; therefore, hold DIN low until an instruction is written to
the device.
0 These bits must be programmed to Logic 0 for correct operation.
RS0 Register
0 Communications register during a write operation
0 Status register during a read operation
1 Mode register
0 Configuration register
1 Data register/data register plus status information
0 ID register
1 GPOCON register
0 Offset register
1 Full-scale register
a reset, the ADC is in this default state waiting for a write
operation to the communications register. In situations where the
interface sequence is lost, a write operation of at least 40 serial
clock cycles with DIN high returns the ADC to this default state
by resetting the entire part. Table 16 outlines the bit designations
for the communications register. CR0 through CR7 indicate the
bit location, CR denoting that the bits are in the communications
register. CR7 denotes the first bit of the data stream. The number
in parentheses indicates the power-on/reset default status of
that bit.
CR4 CR3
RS1(0) RS0(0)
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CR2 CR1
CREAD(0) 0(0)
Register Size
8 bits
8 bits
24 bits
24 bits
24 bits/32 bits
8 bits
8 bits
24 bits
24 bits
AD7194
CR0
0(0)