Table 10-2: Bit Configuration Of Standard Event Status Enable Register - Ametek 2003RP User And Programming Manual

10.10.1 *CLS
This command clears the following registers (see chapter 12 for descriptions of all status
registers):
Standard Event Status
Status Byte
Error Queue
Command Syntax
Parameters
10.10.2 *ESE
This command programs the Standard Event Status Enable register bits. The programming
determines which events of the Standard Event Status Event register (see *ESR?) are
allowed to set the ESB (Event Summary Bit) of the Status Byte register. A "1" in the bit
position enables the corresponding event. All of the enabled events of the Standard Event
Status Enable Register are logically OR-ed to cause the Event Summary Bit (ESB) of the
Status Byte Register to be set. See Section 16 for descriptions of the Standard Event Status
registers.
The query reads the Standard Event Status Enable register.

Table 10-2: Bit Configuration of Standard Event Status Enable Register

Bit Position
Bit Name
Bit Weight
CME Command error
EXE Execution error
PON Power-on
Command Syntax
Parameters
Power-On Value
Example
Query Syntax
Returned Parameters
Related Commands
*CLS
None
7 6 5
PON not used CME
128 32
*ESE <NRf>
0 - 255
128
*ESE 129
*ESE?
<NR1>(Register value)
*ESR? *STB?
4 3 2
EXE DDE QYE
16 8 4
DDE Device-dependent error
QYE Query error
1 0
not used not used