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TABLE 10-3: Chipset Setup
Option
Fail-safe Defaults
DRAM Wait State
2 wait
SYSCLK Divisor Select
AT Ready Delay Selects
2HS1XCLK
Back to Back I/O Delay
3 SYSCLK
ISA Refresh
Disabled
Turbo IDE Command Width
9HS1XCLK
Turbo IDE Back to Back Delay
16HS1XCL
ISA Reserved Memory Size
Disabled
ISA Reserved Memory Base
IRQ3 Reserved for ISA
IRQ4 Reserved for ISA
IRQ5 Reserved for ISA
IRQ7 Reserved for ISA
IRQ9 Reserved for ISA
IRQ10 Reserved for ISA
IRQ11 Reserved for ISA
IRQ14 Reserved for ISA
IRQ15 Reserved for ISA
Boot to PNP OS
Disabled
Optimal Defaults
Possible Settings
1 wait
1 wait, 2 wait
Auto
Auto
CLOCK2IN/2, CLOCK2IN/3,
CLOCK2IN/4, CLOCK2IN/5,
CLOCK2IN/6, CLOCK2IN/8
No Delay
No Delay, 1HS1XCLK, 2HS1XCLK
0 SYSCLK
0 SYSCLK, 1 SYSCLK,
2 SYSCLK, 3 SYSCLK
Disabled
Enabled, Disabled
9HS1XCLK
2HS1XCLK, 3HS1XCLK,
4HS1XCLK, 5HS1XCLK,
6HS1XCLK, 7HS1XCLK
8HS1XCLK, 9HS1XCLK
16HS1XCL
2HS1XCLK, 4HS1XCLK,
6HS1XCLK, 8HS1XCLK,
10HS1XCLK, 12HS1XCLK
14HS1XCLK, 16HS1XCLK
Disabled
Disabled, 16K, 32K, 64K
N/A
N/A
N/A, C8000, CC000, D0000,
D4000, D8000, DC000
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Disabled
Enabled, Disabled
Sets the Wait State value between the CPU and DRAM.
Auto,
Sets the speed of the ISA bus clock (SYSCLK) signal, which must be set to approximately 8MHz. The appropriate divisor depends on
the CPU external bus speed.
Sets the number of SYSCLK wait states to add, after a ready is received on the AT bus.
Sets the delay, in terms of ISA bus clock, between consecutive ISA bus I/O cycles. This option is used for older ISA devices which
require longer delays between consecutive I/O cycles. Due to the higher speed of new processors, it may be necessary to add the Back
to Back I/O Delay for these older adaptor card.
Some ISA peripheral boards use the ISA Refresh signal (for example, bus mouse).
Sets the pulse width of read and write accesses from and to the hard drisk. HS1XCLK is the same speed as the CPU bus clock. The
minimum required pulse width varies from drive to drive. Consult your hard disk specifications for minimum pulse width.
Sets the delay between hard disk accesses. HS1XCLK is the same speed as the bus clock. The minimum required delay varies from
drive to drive. Consult your hard disk specifications for minimum delay.
Both reserve a memory region which a Plug and Play ISA BIOS cannot use.
Use Memory Size and Memory Base to define this region.
Yes, No
When set to No, the specified IRQ<number> is free for a Plug and Play device.
Yes, No
Set IRQ<number> to Yes if an ISA adapter card with a fixed IRQ is installed.
Yes, No
Yes, No
Yes, No
Yes, No
Yes, No
Yes, No
Yes, No
When Enabled, the operating system is Plug and Play compatible: During the boot-up, the BIOS will activate only the PNP devices
required for booting.
Description
VIPer Software Setups
10-11
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