Sun Microsystems Sun Blade 100 Service Manual page 60

CODE EXAMPLE 3-2
@(#) Sun Blade 100 4.0 [obdiag.fixes] Version 1
created 2000/06/09 14:42
Executing Power On SelfTest
@(#) Sun Blade 100 POST 1.2.5 09:09 PM on 08/04/00
Init POST BSS
NVRAM Tests
DMMU TLB Tags
DMMU TLB RAM
Probe Ecache
CPU Clock
All CPU Basic Tests
All Basic MMU Tests
All Basic Cache Tests
UltraSPARC-IIe MCU Control & Status Regs Init
3-8 Sun Blade 100 Service Manual • October 2000
diag-level Variable Set to min
Init System BSS
NVRAM Battery Detect Test
NVRAM Scratch Addr Test
NVRAM Scratch Data Test
DMMU TLB Tag Access Test
DMMU TLB RAM Access Test
Probe Ecache
Ecache Size = 0x00040000 bytes = 256 Kbytes
Initializing SouthBridge
Nominal CPU speed is 500 MHz
V9 Instruction Test
CPU Soft Trap Test
CPU Softint Reg and Int Test
DMMU Primary Context Reg Test
DMMU Secondary Context Reg Test
DMMU TSB Reg Test
DMMU Tag Access Reg Test
IMMU TSB Reg Test
IMMU Tag Access Reg Test
Dcache RAM Test
Icache RAM Test
Initializing Memory and MC registers
DIMM 0: 512 MBytes = 0x20000000 bytes
DIMM 1: 0 MBytes = 0x00000000 bytes