Mitsubishi 00JCPU User Manual page 460

(3) Interrupt factors
Interrupt factors are listed in Table9.13.
Interrupt factor
*1
Interrupt by an interrupt module
Interrupt by a sequence-started
module
Interrupt by the internal timer
*3
Interrupt by an error
Intelligent function module
interrupt
*1: For available interrupt modules, refer to the following.
QCPU User's Manual (Hardware Design, Maintenance and Inspection)
*2: For the Q02CPU, interrupt pointer I49 (the pointer dedicated to the high speed interrupt function) cannot be used.
*3: An interrupt is executed only when the operation mode after the error can be set to "Continue" in the PLC RAS tab of the PLC parameter
dialog box.
*4: For the Basic model QCPU, the interrupt pointer numbers are I50 to I127.
*5: This module can be a serial communication module, MELSECNET/H module, Ethernet module, or high-speed counter module.
For details, refer to the manual for each module.
*6: This module can be an intelligent communication module.
For details, refer to the manual for each module.
*7: When using an interrupt module together with the High Performance model QCPU, check the versions of the CPU module and GX
Developer. ( Appendix 2.2)
To use the intelligent function module interrupt (
setting) is required in the "PLC system" tab of the PLC parameter dialog box. (
9 - 85
Table9.13 Classification of interrupt factors
Interrupt
pointer No.
I0 to 15 Interrupt input from an interrupt module
Interrupt from an AnS/A series special
I16 to I27
function module
interrupt in the CPU module.
Fixed scan interrupt to execute synchronized
I28 to 31
control with the operation cycle of a motion
I49
controller
I32 to I39
Interrupt caused by an error which enables
continuation of sequence program operation.
I40, I41
*4
I50 to 255 Interrupt from an intelligent function module
Description
*6
that is capable of starting an
*5
Section 6.23), the intelligent function module setting (interrupt pointer
CPU module type
Basic High
Process
model Performance
CPU
QCPU model QCPU
*2
Section 8.1.1(2), Section 8.1.2(2))
Redun-
dant CPU