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Introduction
Processor
The Ultra S2S RAID Controller uses an Intel i960 RISC microprocessor which
operates at 33 MHz, has 4 KB of instruction cache and 1 KB of data cache to
manage all controller functions. These include: SCSI bus transfers, RAID
processing, configuration, data striping, error recovery, and drive rebuild.
SCSI Bus
The Ultra S2S RAID Controller uses the Symbios Logic 53C770 SCSI I/O
processor (SIOP) chip on each SCSI channel, allowing the controller to
simultaneously communicate with the host system and read or write data on
several drives. Up to twelve (12) disk drives can be connected to each SCSI
channel.
The controller supports the Fast-20/Wide SCSI-3 (Ultra Wide) standard, which is
backward compatible with earlier SCSI standards.
Memory and DRAM Cache
The Ultra S2S RAID Controller implements a scalable memory design utilizing
interleaved fast page mode, EDO, or self-refreshing DRAM.
Two SIMM locations are provided for standard, off-the-shelf, 36-bit 60ns (or
faster) DRAM SIMMs. Since interleaving is required to provide maximum
performance, an identical memory SIMM is required in each of the two SIMM
sockets. Up to 128 MB of memory can be installed on the controller.
A fast 32-bit interface between the i960 CPU and the cache memory DRAM is
provided by the Memory Control Unit (MCU), which is implemented in discrete
programmable logic. In addition to memory control and addressing functions, the
MCU provides the device mapping and decode for the non-volatile memory
(NVRAM) and the electronically-erasable/programmable read-only memory
(flash EEPROM).
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Processor
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