Clock Generator - EUROCOM M570U Service Manual

Clock Generator

L15
+3VS
HCB1608KF-121T25
L13
+3VS
HCB1608KF-121T25
C155
+3VS
10UF
PLACE CRYSTAL
WITHIN 500 MILS
OF CK410M L14
HCB1608KF-121T25
X1
14.318MHz C159 C163 C165
2 1
10UF 1UF 0.1UF
C137 C136
27P 27P XTAL_IN
XTAL_OUT
? ? ? ! CLK_PCM48 R81 33/0402
[18] CLK_PCM48
CLK_ICH48 R78 33/0402
[15] CLK_ICH48
R79 2.2K/0402
[5] CLK_BSEL0
R74 2.2K/0402
[5] CLK_BSEL1
R69 33/0402
[26] SIO_CLK14
R70 2.2K/0402
[5] CLK_BSEL2
R66 33/0402
[15] CLK_ICH14
R63 0/0402
[15] PM_STPCPU#
R62 0/0402
[15] PM_STPPCI#
PCLK_FWH R67 33/0402
[15] PCLK_FWH
PCLK_SIO R65 33/0402
[26] PCLK_SIO
PCLK_LAN R543 22/0402
[21] PCLK_LAN
PCLK_MINI R59 22/0402
[20] PCLK_MINI
PCLK_TPM R57 22/0402
[26] PCLK_TPM
PCLK_PCM R58 22/0402
[18] PCLK_PCM
PCLK_H8 R76 33/0402
[27] PCLK_H8
PCLK_ICH R75 33/0402
[14] PCLK_ICH
[10,11,15,19,20,21,23] SMBCLK
[10,11,15,19,20,21,23] SMBDATA
R77 0/0402
[28] CLKEN#
FSLC FSLB FSLA Host Clock
BSEL2 BSEL1 BSEL0 Frequency
1 0 1 100 MHz
0 0 1 133 MHz
0 1 1 166 MHz
1 1 1 200 MHz
+3VS [3,6,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24,26,27,28,29,31]
CLOCK GENERATOR
C170 C171 C161 C172 C175
10UF 1UF 0.1UF 0.1UF 0.1UF
C158
0.1UF
R80 4.3K_1%/0402
C134 C133 C156
10UF 1UF 0.1UF
U6
11 49 1 4
VDD_48 CPUCLK1
45 48 2 3
VDDA CPUCLK1#
52 1 4
CPUCLK0
58 51 2 3
X1 CPUCLK0#
57 44
X2 PCIEX8
43
PCIEX8#
41
PCIEX7
40
PCIEX7#
FSLA 12 39 RN8 1 4
FSLA/USB_48MHz_2X PCIEX6
38 4P2RX22 2 3
PCIEX6#
FSLB 60
REF0/FSLB
36 1 4
PCIEX5
FSLC 61 35 2 3
REF1/FSLC PCIEX5#
62 30 RN10 4 1
CPU_STOP# PCIEX4
63 31 4P2RX22 3 2
PCI/PCIEX_STOP# PCIEX4#
5 26 4 1
PCICLK3 SATACLK
27 3 2
SATACLK#
4 24 4 1
PCICLK2_2X PCIEX3
25 3 2
PCIEX3#
33
PEREQ4#
3
PCICLK1_2X
22 4 1
PCIEX2
23 3 2
PCIEX2#
64 32
PCICLK0_2X PEREQ3#
19 4 1
PCIEX1
9 20 3 2
*SELDOT/PCICLK_F1 PCIEX1#
34
PEREQ2#
8
PCICLK_F0
17 R87
LCDCLK/PCIEX0
54 18
SCLK LCDCLK#/PCIEX0#
55 16
SDATA PEREQ1#
10
VTT_PWRGD#/PD
14
27FIX/DOT96
15
27SS/DOT96#
ICS9LPR310BGLF
PEREQ1#: P CIECLK 0, 6
PEREQ2#: P CIECLK 1, 8
PEREQ3#: P CIECLK 2, 4
PEREQ4#: P CIECLK 3, 5, 7
PEREQ[1..4]# ha ve interna l pull up
L12
+3VS
HCB1608KF-121T25
C142 C151
0.1UF 0.1UF
PCLK_LAN
PCLK_TPM
RN3 CLK_MCH_BCLK
CLK_MCH_BCLK [5]
4P2RX22 CLK_MCH_BCLK# PCLK_H8
CLK_MCH_BCLK# [5]
RN1 CLK_CPU_BCLK PCLK_SIO
CLK_CPU_BCLK [3]
4P2RX22 CLK_CPU_BCLK#
CLK_CPU_BCLK# [3]
CLK_PCM48
CLK_ICH48
PCLK_MINI
PCLK_ICH
CLK_PCIE_MINI2 PCLK_PCM
CLK_PCIE_MINI2 [20]
CLK_PCIE_MINI2#
CLK_PCIE_MINI2# [20]
CLK_ICH14
RN11 CLK_PCIE_ICH
CLK_PCIE_ICH [14]
4P2RX22 CLK_PCIE_ICH# SIO_CLK14
CLK_PCIE_ICH# [14]
CLK_VGA PCLK_FWH
CLK_VGA [12]
CLK_VGA#
CLK_VGA# [12]
RN6 CLK_SATA Place terminationclose to
CLK_SATA [13]
4P2RX22 CLK_SATA#
CLK_SATA# [13] CK410M
RN5 CLK_PCIE_MINI1
CLK_PCIE_MINI1 [20]
4P2RX22 CLK_PCIE_MINI1#
CLK_PCIE_MINI1# [20]
WLAN_CLKREQ# [20]
RN4 CLK_PCIE_NEW_CARD
CLK_PCIE_NEW_CARD [19]
4P2RX22 CLK_PCIE_NEW_CARD#
CLK_PCIE_NEW_CARD# [19]
NEWCARD_CLKREQ# [19]
RN2 CLK_PCIE_3GPLL
CLK_PCIE_3GPLL [6]
4P2RX22 CLK_PCIE_3GPLL#
CLK_PCIE_3GPLL# [6]
NB_CLKREQ# [6]
10K/0402
+3VS
PCIE2_CLKREQ# [20]
Schematic Diagrams
Sheet 2 of 40
Clock Generator
C780 *10P
C138 *10P
C157 *10P
C148 *10P
C162 *10P
C160 *10P
C141 *10P
C154 *10P
C140 *10P
C149 *10P
C153 *10P
C150 *10P
Clock Generator B - 3