Calistoga 2/5 - EUROCOM M570U Service Manual

Calistoga 2/5

U28B
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
RSVD_9
J29
MCH_BSEL[2..0]
RSVD_10
A41
RSVD_11
001 = PSB533
A35
RSVD_12
A34
011 = PSB667 RSVD_13
D28
RSVD_14
D27
Others =
RSVD_15
Reserved
K16
[5] MCH_BSEL0 CFG_0
K18
[5] MCH_BSEL1
CFG_1
J18
[5] MCH_BSEL2
CFG_2
F18
CFG_3
E15
CFG_4
MCH_CFG5 F15
CFG_5
CFG[17..3] has E18
CFG_6
MCH_CFG7 D19
CFG_7
internal pull up D16
CFG_8
MCH_CFG9 G16
CFG_9
E16
CFG_10
D15
CFG[20..18] has
CFG_11
MCH_CFG12 G15
CFG_12
MCH_CFG13 K15
internal pull down
CFG_13
C15
CFG_14
H16
CFG_15
MCH_CFG16 G18
CFG_16
H15
CFG_17
MCH_CFG18 J25
CFG_18
MCH_CFG19 K27
CFG_19
MCH_CFG20 J26
CFG_20
G28
[15] PM_BMBUSY# PM_BMBUSY#
PM_EXTTS0# F25
[10] PM_EXTTS0# PM_EXTTS#_0
PM_EXTTS1#_R H26
PM_EXTTS#_1
G6
[3,13] PM_THRMTRIP#
PM_THRMTRIP#
AH33
[15,28] DELAY_VR_PWRGD
PWROK
AH34
RSTIN#
NB_RSTIN#
[12,14,15] PLTRST#
R351 100
H28
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
K28
[14] MCH_ICH_SYNC# ICH_SYNC#
R44 *0/0402 H32
[2] NB_CLKREQ# CLK_REQ0#
D1
NC0
C41
NC1
C1
NC2
BA41
NC3
BA40
NC4
BA39
NC5
BA3
NC6
BA2
NC7
BA1
NC8
B41
NC9
B2
NC10
AY41
NC11
AY1
NC12
AW41
NC13
AW1
NC14
A40
NC15
A4
NC16
A39
NC17
A3
NC18
CALISTOGA
R42 *2.2K/0402 MCH_CFG12
R45 *2.2K/0402 MCH_CFG13 Calis toga Strapping
R41 *2.2K/0402 MCH_CFG5 MCH_CFG5
R40 *2.2K/0402 MCH_CFG7 MCH_CFG7 (CPU Strap)
R38 *2.2K/0402 MCH_CFG9 MCH_CFG9 (PCIE Graphics Lane)
R43 *2.2K/0402 MCH_CFG16
MCH_CFG16 (FSB Dynam ic ODT)
R320 *1K/0402 MCH_CFG18 MCH_CFG18 (VCC s elect)
R328 *1K/0402 MCH_CFG19 MCH_CFG19 (DMI Lane reversal)
+3VS
R329 *1K/0402 MCH_CFG20 MCH_CFG20 (PCIe backward
inerpoerability m ode)
AY35
SM_CK_0 M_CLK_DDR0 [10]
AR1
SM_CK_1 M_CLK_DDR1 [10]
AW7
SM_CK_2 M_CLK_DDR2 [11]
AW40
M_CLK_DDR3 [11]
SM_CK_3
AW35
SM_CK#_0 M_CLK_DDR#0 [10]
AT1
SM_CK#_1 M_CLK_DDR#1 [10]
AY7
SM_CK#_2 M_CLK_DDR#2 [11]
AY40
M_CLK_DDR#3 [11]
SM_CK#_3
AU20
SM_CKE_0 M_CKE0 [10]
AT20
SM_CKE_1 M_CKE1 [10]
BA29
SM_CKE_2 M_CKE2 [11]
AY29
M_CKE3 [11]
SM_CKE_3
AW13
SM_CS#_0 M_CS#0 [10]
AW12
SM_CS#_1 M_CS#1 [10]
AY21
SM_CS#_2 M_CS#2 [11]
AW21
M_CS#3 [11]
SM_CS#_3
+1.8V
AL20
SM_OCDCOMP_0
AF10
SM_OCDCOMP_1
BA13
M_ODT0 [10]
SM_ODT_0
BA12 R353
M_ODT1 [10]
SM_ODT_1
AY20
SM_ODT_2 M_ODT2 [11]
AU21 1K_1%
SM_ODT_3 M_ODT3 [11]
AV9 M_RCOMPN M_VREF_MCH
SM_RCOMP#
AT9 M_RCOMPP
SM_RCOMP
C565 C566
AK1 R352
SM_VREF_0
AK41 1UF_X7R 0.01UF
SM_VREF_1
1K_1%
AF33
G_CLKIN# CLK_PCIE_3GPLL# [2]
AG33
G_CLKIN CLK_PCIE_3GPLL [2]
A27
D_REFCLKIN#
A26 R343 10K/0402
Design guide : P.361
D_REFCLKIN
C40
D_REFSSCLKIN#
D41 R344 10K/0402 +1.5VS
D_REFSSCLKIN
DMI_TXN[3:0] [14]
AE35 DMI_TXN0
DMI_RXN_0
AF39 DMI_TXN1 DMI_TXN1
DMI_RXN_1
AG35 DMI_TXN2
DMI_RXN_2
AH39 DMI_TXN3
DMI_RXN_3
DMI_TXP[3:0] [14]
AC35 DMI_TXP0
DMI_RXP_0
AE39 DMI_TXP1
DMI_RXP_1
AF35 DMI_TXP2
DMI_RXP_2
AG39 DMI_TXP3
DMI_RXP_3
AE37 DMI_RXN0
DMI_TXN_0
AF41 DMI_RXN1
DMI_TXN_1
AG37 DMI_RXN2
DMI_RXN[3:0] [14]
DMI_TXN_2
AH41 DMI_RXN3
DMI_TXN_3
AC37 DMI_RXP0
DMI_TXP_0
AE41 DMI_RXP1
DMI_TXP_1
AF37 DMI_RXP2
DMI_TXP_2 DMI_RXP[3:0] [14]
AG41 DMI_RXP3
DMI_TXP_3
LOW HIGH R333
+3VS
R332
DMIx2 DMIx4
[11] PM_EXTTS1#
RSVD Mobile CPU
[15,28]
Reverse Lane Norm al operation
R73
Disable Enable
+1.8V
R64
1.05V 1.5V
Normal Lanes reversed
Only SDCO or PCIe SDVO and PCIe x1 are operation
+1.05VS
x1 is operational s im ultneously via the PEG port +1.5VS
+1.8V
+3VS
?
+1.5VS
U28C
D32
L_BKLTCTL EXP_A_COMPI
J30
L_BKLTEN EXP_A_COMPO
H30
L_CLKCTLA
H29
L_CLKCTLB EXP_A_RXN_0
G26
L_DDC_CLK EXP_A_RXN_1
G25
L_DDC_DATA EXP_A_RXN_2
B38
L_IBG EXP_A_RXN_3
C35
L_VBG EXP_A_RXN_4
F32
L_VDDEN EXP_A_RXN_5
C33
L_VREFH EXP_A_RXN_6
C32
L_VREFL EXP_A_RXN_7
EXP_A_RXN_8
A33
LA_CLK# EXP_A_RXN_9
A32
LA_CLK EXP_A_RXN_10
E27
LB_CLK# EXP_A_RXN_11
E26
LB_CLK EXP_A_RXN_12
EXP_A_RXN_13
C37
LA_DATA#_0 EXP_A_RXN_14
B35
LA_DATA#_1 EXP_A_RXN_15
A37
LA_DATA#_2
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
B37
LA_DATA_0 EXP_A_RXP_3
B34
LA_DATA_1 EXP_A_RXP_4
A36
LA_DATA_2 EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
G30
LB_DATA#_0 EXP_A_RXP_8
D30
LB_DATA#_1 EXP_A_RXP_9
F29
LB_DATA#_2 EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
F30
LB_DATA_0 EXP_A_RXP_14
D29
LB_DATA_1 EXP_A_RXP_15
F28
LB_DATA_2
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
A16
TV_DACA_OUT EXP_A_TXN_4
C18
TV_DACB_OUT EXP_A_TXN_5
A19
TV_DACC_OUT EXP_A_TXN_6
EXP_A_TXN_7
J20
+1.5VS TV_IREF EXP_A_TXN_8
B16
TV_IRTNA EXP_A_TXN_9
B18
Design guide : P.189
TV_IRTNB EXP_A_TXN_10
B19
TV_IRTNC EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
+1.05VS R341 0/0402 E23
CRT_BLUE EXP_A_TXP_0
D23
CRT_BLUE# EXP_A_TXP_1
C22
Design guide : P.173
CRT_GREEN EXP_A_TXP_2
B22
CRT_GREEN# EXP_A_TXP_3
A21
CRT_RED EXP_A_TXP_4
B21
CRT_RED# EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
C26
CRT_DDC_CLK EXP_A_TXP_8
C25
CRT_DDC_DATA EXP_A_TXP_9
G23
CRT_HSYNC EXP_A_TXP_10
+1.05VS R47 0/0402 J22
CRT_IREF EXP_A_TXP_11
H23
CRT_VSYNC EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
CALISTOGA
[12] PCIE_RXN[0..15]
[12] PCIE_RXP[0..15]
[12] PCIE_TXN[0..15]
10K/0402 PM_EXTTS0#
[12] PCIE_TXP[0..15]
10K/0402 PM_EXTTS1#
PM_EXTTS1# R331 0/0402 PM_EXTTS1#_R
R330 *0/0402
PM_DPRSLPVR
80.6_1% M_RCOMPN
80.6_1% M_RCOMPP
[3,4,5,8,9,13,16,29]
[4,8,9,14,15,16,19,20,30]
[8,10,11,15,30]
[2,3,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24,26,27,28,29,31]
Schematic Diagrams
R39 24.9_1%
D40 PEG_COMP
D38
F34 PCIE_RXN0
G38 PCIE_RXN1
PCIE_RXN2
H34
PCIE_RXN3
J38
L34 PCIE_RXN4
M38 PCIE_RXN5
N34 PCIE_RXN6
PCIE_RXN7
P38
PCIE_RXN8
R34
T38 PCIE_RXN9
V34 PCIE_RXN10
W38 PCIE_RXN11
Y34 PCIE_RXN12
PCIE_RXN13
AA38
AB34 PCIE_RXN14
AC38 PCIE_RXN15
D34 PCIE_RXP0
PCIE_RXP1
F38
PCIE_RXP2
G34
H38 PCIE_RXP3
J34 PCIE_RXP4
PCIE_RXP5
L38
PCIE_RXP6
M34
N38 PCIE_RXP7
P34 PCIE_RXP8
R38 PCIE_RXP9 Sheet 6 of 40
PCIE_RXP10
T34
V38 PCIE_RXP11
W34 PCIE_RXP12
Calistoga 2/5
Y38 PCIE_RXP13
AA34 PCIE_RXP14
PCIE_RXP15
AB38
F36 PCIE_TXN0
G40 PCIE_TXN1
H36 PCIE_TXN2
PCIE_TXN3
J40
PCIE_TXN4
L36
M40 PCIE_TXN5
N36 PCIE_TXN6
P40 PCIE_TXN7
PCIE_TXN8
R36
PCIE_TXN9
T40
V36 PCIE_TXN10
W40 PCIE_TXN11
Y36 PCIE_TXN12
PCIE_TXN13
AA40
PCIE_TXN14
AB36
AC40 PCIE_TXN15
PCIE_TXP0
D36
PCIE_TXP1
F40
G36 PCIE_TXP2
H40 PCIE_TXP3
J36 PCIE_TXP4
PCIE_TXP5
L40
PCIE_TXP6
M36
N40 PCIE_TXP7
P36 PCIE_TXP8
R40 PCIE_TXP9
PCIE_TXP10
T36
PCIE_TXP11
V40
W36 PCIE_TXP12
Y40 PCIE_TXP13
AA36 PCIE_TXP14
PCIE_TXP15
AB40
PCIE_RXN[0..15]
PCIE_RXP[0..15]
PCIE_TXN[0..15]
PCIE_TXP[0..15]
Calistoga 2/5 B - 7