Schematic Diagrams
YONAH 1/2
[5]
H_A#[31:3]
[5]
H_ADSTB#0
[5]
H_REQ#[4:0]
[5]
H_A#[31:3]
Sheet 3 of 40
[5]
H_ADSTB#1
YONAH 1/2
[13]
[13]
[13]
H_IGNNE#
[13]
H_STPCLK#
[13]
[13]
[13]
+1.05VS
R277
R21
R276
R25
R22
R310
R24
R275
+3VS
B - 4 YONAH 1/2
JSKT1A
H_A#3
J4
H1
A[3]#
ADS#
H_A#4
L4
E2
A[4]#
BNR#
H_A#5
M3
G5
A[5]#
BPRI#
H_A#6
K5
A[6]#
H_A#7
M1
H5
A[7]#
DEFER#
H_A#8
N2
F21
A[8]#
DRDY#
H_A#9
J1
E1
A[9]#
DBSY#
H_A#10
N3
A[10]#
H_A#11
P5
F1
A[11]#
BR0#
H_A#12
P2
A[12]#
H_A#13
L1
D20
H_IERR#
A[13]#
IERR#
H_A#14
P4
B3
A[14]#
INIT#
H_A#15
P1
A[15]#
H_A#16
R1
H4
A[16]#
LOCK#
L2
ADSTB[0]#
B1
RESET#
H_REQ#0
K3
F3
REQ[0]#
RS[0]#
H_REQ#1
H2
F4
REQ[1]#
RS[1]#
H_REQ#2
K2
G3
REQ[2]#
RS[2]#
H_REQ#3
J3
G2
REQ[3]#
TRDY#
H_REQ#4
L5
REQ[4]#
G6
HIT#
H_A#17
Y2
E4
A[17]#
HITM#
H_A#18
U5
A[18]#
H_A#19
R3
AD4
H_BPM0#
A[19]#
BPM[0]#
H_A#20
W6
AD3
H_BPM1#
A[20]#
BPM[1]#
H_A#21
U4
AD1
H_BPM2#
A[21]#
BPM[2]#
H_A#22
Y5
AC4
H_BPM3#
A[22]#
BPM[3]#
H_A#23
U2
AC2
H_PRDY#
A[23]#
PRDY#
H_A#24
R4
AC1
H_PREQ#
A[24]#
PREQ#
H_A#25
T5
AC5
H_TCK
A[25]#
TCK
H_A#26
T3
AA6
H_TDI
A[26]#
TDI
H_A#27
W3
AB3
H_TDO
A[27]#
TDO
H_A#28
W5
AB5
H_TMS
A[28]#
TMS
H_A#29
Y4
AB6
H_TRST#
A[29]#
TRST#
H_A#30
W2
C20
ITP_DBRST#
A[30]#
DBR#
H_A#31
Y1
A[31]#
V4
D21
H_PROCHOT#
ADSTB[1]#
PROCHOT
A24
H_THERMDA
THERMDA
A6
A25
H_THERMDC
H_A20M#
A20M#
THERMDC
A5
H_FERR#
FERR#
PM_THRMTRIP# [6,13]
C4
C7
IGNNE#
THERMTRIP#
PM_THRMTRIP# [6,13]
D5
STPCLK#
C6
H_INTR
LINT0
B4
A22
H_NMI
LINT1
BCLK[0]
A3
A21
H_SMI#
SMI#
BCLK[1]
AA1
RSVD[01]#
AA4
T22
RSVD[02]#
RSVD[12]#
AB2
RSVD[03]#
AA3
RSVD[04]#
M4
D2
RSVD[05]#
RSVD[13]#
N5
F6
RSVD[06]#
RSVD[14]#
T2
D3
RSVD[07]#
RSVD[15]#
V3
C1
RSVD[08]#
RSVD[16]#
B2
AF1
RSVD[09]#
RSVD[17]#
C3
D22
RSVD[10]#
RSVD[18]#
C23
RSVD[19]#
B25
C24
RSVD[11]#
RSVD[20]#
1-1674770-2
56
H_IERR#
H_PREQ#
54.9_1%
If PROCHOT# is routed between CPU, IMVP and
H_PROCHOT#
68
MCH, pull-up resistor has to be 75 ohm ? 5%
39
H_TMS
150_1%
H_TDI
Within 2.0" of the CPU
H_TCK
27
H_TRST#
680
150_1%
ITP_DBRST#
R584
*100K
C448
0.1UF
H_THERMDA
H_THERMDC
C450
Layout Note:
2200P
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil
Layout Note:
spacing.
Near to
G781
[5]
H_D#[63:0]
H_ADS#
[5]
H_BNR#
[5]
H_BPRI# [5]
H_DEFER# [5]
H_DRDY# [5]
H_DBSY# [5]
H_BR0#
[5]
H_INIT#
[13]
H_LOCK# [5]
H_CPURST# [5]
H_RS#0
[5]
[5]
H_DSTBN#0
H_RS#1
[5]
[5]
H_DSTBP#0
H_RS#2
[5]
[5]
H_DINV#0
H_TRDY# [5]
[5]
H_D#[63:0]
H_HIT#
[5]
H_HITM# [5]
voltage
translation
FROM IMVP6
[5]
H_DSTBN#1
[5]
H_DSTBP#1
Layout note:
[5]
H_DINV#1
PM_THRMTRIP# should connect to
ICH7 and GMCH without T-ing
R286
*1K
CLK_CPU_BCLK [2]
R288
51.1_1%
CLK_CPU_BCLK# [2]
[5]
CPU_BSEL0
[5]
CPU_BSEL1
[5]
CPU_BSEL2
Layout Note:
0.5" max, Zo= 55 Ohms
CPU_GTLREF
C522
C520
C519
1UF_X7R
0.1UF_X7R
0.01UF
+VDD3
Q35
NDS352AP_NL
R582
D
S
2006/03/10
100K
R583
R282
100K
22
Q36
2N7002
G
Q14
2N7002
G
THERM_RST [27]
R291
R585
*0
*20K
U25
1
8
VDD
SCLK
H8_SMCLK-A [27,32]
2
7
H8_SMDATA-A [27,32]
D+
SDATA
3
6
R292
*0/0402
PM_THRM#
PM_THRM# [15,27]
D-
ALERT#
4
5
THERM#
GND
G781/ADM1032ARM
R289
0/0402
R290
10K
+VDD3
+1.05VS
[4,5,6,8,9,13,16,29]
+3VS
[2,6,9,10,11,12,13,14,15,16,17,18,19,20,21,23,24,26,27,28,29,31]
+VDD3
[13,22,28,30,31]
JSKT1B
H_D#[63:0] [5]
H_D#0
E22
AA23
H_D#32
D[0]#
D[32]#
H_D#1
F24
AB24
H_D#33
D[1]#
D[33]#
H_D#2
E26
V24
H_D#34
D[2]#
D[34]#
H_D#3
H22
V26
H_D#35
D[3]#
D[35]#
H_D#4
F23
W25
H_D#36
D[4]#
D[36]#
H_D#5
G25
U23
H_D#37
D[5]#
D[37]#
H_D#6
E25
U25
H_D#38
D[6]#
D[38]#
H_D#7
E23
U22
H_D#39
D[7]#
D[39]#
H_D#8
K24
AB25
H_D#40
D[8]#
D[40]#
H_D#9
G24
W22
H_D#41
D[9]#
D[41]#
H_D#10
J24
Y23
H_D#42
D[10
D[42]#
H_D#11
J23
AA26
H_D#43
D[11]#
D[43]#
H_D#12
H26
Y26
H_D#44
D[12]#
D[44]#
H_D#13
F26
Y22
H_D#45
D[13]#
D[45]#
H_D#14
K22
AC26
H_D#46
D[14]#
D[46]#
H_D#15
H25
AA24
H_D#47
D[15]#
D[47]#
H23
W24
H_DSTBN#2 [5]
DSTBN[0]#
DSTBN[2]#
G22
Y25
DSTBP[0]#
DSTBP[2]#
H_DSTBP#2 [5]
J26
V23
DINV[0]#
DINV[2]#
H_DINV#2 [5]
H_D#[63:0] [5]
H_D#16
N22
AC22
H_D#48
D[16]#
D[48]#
H_D#17
K25
AC23
H_D#49
D[17]#
D[49]#
H_D#18
P26
AB22
H_D#50
D[18]#
D[50]#
H_D#19
R23
AA21
H_D#51
D[19]#
D[51]#
H_D#20
L25
AB21
H_D#52
D[20]#
D[52]#
H_D#21
L22
AC25
H_D#53
D[21]#
D[53]#
H_D#22
L23
AD20
H_D#54
D[22]#
D[54]#
H_D#23
M23
AE22
H_D#55
D[23]#
D[55]#
H_D#24
P25
AF23
H_D#56
D[24]#
D[56]#
H_D#25
P22
AD24
H_D#57
D[25]#
D[57]#
H_D#26
P23
AE21
H_D#58
D[26]#
D[58]#
H_D#27
T24
AD21
H_D#59
D[27]#
D[59]#
H_D#28
R24
AE25
H_D#60
D[28]#
D[60]#
H_D#29
L26
AF25
H_D#61
D[29]#
D[61]#
H_D#30
T25
AF22
H_D#62
D[30]#
D[62]#
H_D#31
N24
AF26
H_D#63
D[31]#
D[63]#
M24
AD23
DSTBN[1]#
DSTBN[3]#
H_DSTBN#3 [5]
N25
AE24
H_DSTBP#3 [5]
DSTBP[1]#
DSTBP[3]#
M26
AC20
H_DINV#3 [5]
DINV[1]#
DINV[3]#
AD26
R26
COMP0
GTLREF
COMP[0]
MISC
U26
COMP1
COMP[1]
U1
COMP2
COMP[2]
C26
V1
COMP3
TEST1
COMP[3]
D25
E5
H_DPRSTP# [13,28]
TEST2
DPRSTP#
B5
H_DPSLP# [13]
DPSLP#
D24
DPWR#
H_DPWR# [5]
B22
D6
BSEL[0]
PWRGOOD
H_PWRGD [13]
B23
D7
BSEL[1]
SLP#
H_CPUSLP# [5]
C21
AE6
BSEL[2]
PSI#
PM_PSI#
[28]
1-1674770-2
R307
1K_1%
+1.05VS
R306
2K_1%
Layout Note:
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
COMP1, COMP3: 0.5" Max, Zo=55
Best estimate is 18 mils wide trace for outer
layers and 14 mils wide trace if on internal
layers.
COMP0
COMP1
COMP2
COMP3
R20
R19
R302
54.9_1%
27.4_1%
54.9_1%
Ohms
R303
27.4_1%
Need help?
Do you have a question about the M570U and is the answer not in the manual?
Questions and answers