Clock Generator - EUROCOM M22ES Service Manual

Schematic Diagrams

Clock Generator

VCC_CORE
Sheet 5 of 31
Clock Generator
B - 6 Clock Generator (71-M2200-D06)
Main Clock Generator
+3VS
L72
BK2125HS121
CLKVCC
1 2
C571
C572 C545 C519 C513 C501 C525 C570 C544
0.1UF 10UF/16V 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
+3VS
+3VS +3VS
R352
10K
R381
R387
D20
10K 10K C A Z0538
[12,13] CPUSTP-
Z0503
1N4148
Z0502
R397 C C
Z0504 B B Q10
R361
Z0505
E Q11 E 2N3904
2N3904
10K 475 1%
L70
BK1608HS121
Z0506
+3VS 1 2
C533 C528 C529
0.1UF 0.01UF
0.1UF
ICS 952001
+3VS
CY 28342
C573 C526 C520
10UF/16V 0.01UF 0.1UF
Clock Buffer (DDR)
+2.5VS
L76
BUFFERVCC
1 2 BK2125HS121
C618 C608 C586
C619 C620 C621
10UF/16V 0.1UF 0.1UF
10UF/16V 0.01UF 0.1UF
+2.5VS
L74
1 2 BK1608HS121
C589 C602
10UF/16V 0.01UF
+3VS Frequency
SMBCLK
Selection
SMBDAT
R338 4.7K
FS0
R339 4.7K FS1
FWDSDCLKO
R340 4.7K(R) FS2
[5] FWDSDCLKO
R341 4.7K(R) FS3
R342 4.7K(R) FS4
FB_IN
+3VS
T185
T191
T184
R281 R277
4.7K
4.7K
BSEL0 [2]
BSEL1 [2]
PLEASE PLACE IN COMP SIDE
AND NEAR TOGETHER
FS4 FS3 FS2 FS1 FS0
0 0 0
BSEL1 BSEL0 Function
L L
L H 0 0 0
H L
H H
Damping Resistors
Place near to the
Clock Outputs
U22
CLOCK GEN (650)
1 4P2RX33
VDDREF
Z0507 RP52
11 40 1 4
VDDZ CPUCLK0
Z0508
13 39 2 3
VDDPCI CPUCLK#0
19 4P2RX33
VDDPCI
Z0509 RP51
28 44 1 4
VDD48 CPUCLK1
Z0510
29 43 2 3
VDDAGP CPUCLK#1
42
VDDCPU
Z0511 R351 22
48 47
VDDSD SDCLK
Z0512 R377 22
12 31
PCI_STOP# AGPCLK0
Z0513 R380 22
30
AGPCLK1
5
VSSREF
Z0514 R359 22
8 9
VSSZ ZCLK0
Z0515 R363 22
18 10
VSSPCI ZCLK1
24
VSSPCI
FS3 R374 33
25 14
VSS48 PCICLK_F0/FS3
FS4 R373 33
32 15
VSSAGP PCICLK_F1/FS4
Z0516
41 16 R376 33
VSSCPU PCICLK0
Z0517
46 17 R379 33
VSSSD PCICLK1
Z0518
20 R390 33
PCICLK2
Z0519
21 R395 33
PCICLK3
Z0520
22 R403 33
PCICLK4
Z0521
45 23 R409 33(R)
CPU_STOP# PCICLK5
FS0 R350
2 33
REF0/FS0
FS1
33 3 R354 33
PD#/VTT_PWRGD REF1/FS1
FS2
4 R355 33
REF2/FS2
Z0522 R391 22
38 27
IREF 48M
MULTISEL
26 R396 22
24_48M/MULTISEL
36
VDDA
SMBCLK
35
SMBCLK [8,12,20]
SCLK SMBDAT
34
SMBDAT [8,12,20]
SDATA
37
VSSA
Y6
Z0523 Z0524
1 2 MULTISEL R404
14.318MHz
C488 C489
10PF 10PF
DDRCLK[0..5]
U28
DDRCLK-[0..5]
CLOCK BUFFER (DDR48)
RP69
4P2RX0 DDRCLK3
3 2 Z0526 3 2
VDD CLK0
DDRCLK-3
12 1 Z0527 4 1
VDD CLK#0
C591 23
VDD
RP73 4P2RX0 DDRCLK2
4 Z0528 4 1
CLK1
DDRCLK-2
0.1UF 5 Z0529 3 2
CLK#1
RP75 4P2RX0 DDRCLK0
13 Z0530 4 1
CLK2
DDRCLK-0
14 Z0531 3 2
CLK#2
Z0525 10
AVDD
RP76 4P2RX0 DDRCLK1
17 Z0532 1 4
CLK3
DDRCLK-1
C605 16 Z0533 2 3
CLK#3
RP72 4P2RX0 DDRCLK4
0.1UF 24 Z0534 2 3
CLK4
DDRCLK-4
25 Z0535 1 4
CLK#4
RP70 4P2RX0 DDRCLK5
7 26 Z0536 2 3
SCLK CLK5
DDRCLK-5
27 Z0537 1 4
CLK#5
22
SDATA
R431 22 FB_IN
19 FB_OUT
FB_OUT
8
CLK_IN
NEAR DDR SODIMM
20 28
FB_IN GND
15
GND
11
GND
TZ0509 9 6
NC GND
TZ0510 18
NC
TZ0511 21
NC
ICS 93722
CY28352
CPU SDRAM ZCLK AGP PCI
1 1 100M 133M 66M 66M 33M
0 1 100M 100M 66M 66M 33M
By-Pass Capacitors
Place near to the Clock
Outputs
HCLK-CPU
HCLK-CPU [2]
49.9 1%
HCLK-CPU# HCLK-CPU R364
HCLK-CPU# [2]
49.9 1%
HCLK-CPU# R370
HCLK-650
HCLK-650 [4]
49.9 1%
HCLK-650# HCLK-650 R356
HCLK-650# [4]
49.9 1%
HCLK-650# R360
SDCLK
SDCLK [5]
SDCLK C502 10PF(R)
AGPCLK
AGPCLK [4]
GCLK_AGP
T174
AGPCLK C532
ZCLK0 10PF(R)
ZCLK0 [6]
ZCLK1
ZCLK1 [11]
PCICLK961
PCICLK961 [11]
PCICLK1394
PCICLK1394 [18]
ZCLK0
PCICLKPCM C514 10PF(R)
PCICLKPCM [17]
PCICLKLAN
PCICLKLAN [16]
PCICLKIO ZCLK1
C518 10PF(R)
PCICLKIO [19]
PCICLKH8
PCICLKH8 [20]
PCICLKDEBUG
PCICLKDEBUG [15]
PCICLK961 10PF(R)
PCICLKMINI C524
T178
14.381MHZ
PCICLK1394
REFCLK0 C531 10PF(R)
REFCLK0 [6]
REFCLK1
REFCLK1 [12]
PCICLKPCM
CLKAPIC C538 10PF(R)
CLKAPIC [12]
48 MHZ
UCLK48M PCICLKLAN
C543 10PF(R)
UCLK48M [13]
SIO48M
SIO48M [19]
PCICLKIO
C547 10PF(R)
PCICLKH8 10PF(R)
C551
UCLK48M
C548 10PF(R)
0(R)
CLKVCC BUFFERVCC
C579 C508 C617
0.1UF 0.1UF 0.1UF
DDRCLK[0..5] [8]
DDRCLK-[0..5] [8]
+5VS +5VS
By-Pass Capacitors
Place near to the Clock Buffer
FB_IN C603 10PF(R)
+2.5V BUFFERVCC CLKVCC
C710 C712 C578
0.1UF 0.1UF 0.1UF
2.5V 2.5V +2.5V
C622
0.1UF
CLKVCC
C708
0.1UF
2.5V