Figure 46. Output Voltage Timing; Table 71. Output Voltage Timing; Table 72. Turn On/Off Timing - Intel SC5650BCDP Technical Product Specification

Intel Server Board S5500BC TPS
®
Item
T Output voltage rise time from each main output.
vout_rise
T All main outputs must be within regulation of each other
vout_on
within this time.
T All main outputs must leave regulation within this time.
vout_off
*The 5 VSB output voltage rise time shall be from 1.0 ms to 25.0 ms
Item
T Delay from AC applied to 5VSB within regulation.
sb_on_delay
T Delay from AC applied to all output voltages within regulation.
ac_on_delay
T Time all output voltages stay within regulation after loss of
vout_holdup
AC. Measured at 75% of maximum load.
T Delay from loss of AC to de-assertion of PWOK. Measured at
pwok_holdup
75% of maximum load.
T Delay from PSOn
pson_on_delay
limits.
T Delay from PSOn
pson_pwok
Revision 1.8

Table 71. Output Voltage Timing

Description

Figure 46. Output Voltage Timing

Table 72. Turn On/Off Timing

Description
#
active to output voltages within regulation
#
deactive to PWOK being de-asserted.
Intel order number: E42249-009
Power and Environmental Specifications
Minimum Maximum
5.0 * 70 *
50
400
Minimum Maximum
1500
2500
21
20
5 400
50
Units
msec
msec
msec
Units
ms
ms
ms
ms
ms
ms
111