Intel SC5650BCDP Technical Product Specification
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Intel SC5650BCDP Technical Product Specification

Intel SC5650BCDP Technical Product Specification

Technical product specification
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Intel® Server Board S5500BC
Technical Product Specification
Intel order number: E42249-009
Revision 1.8
June 2011
Enterprise Platforms and Services Division – Marketing

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  • Page 1 Intel® Server Board S5500BC Technical Product Specification Intel order number: E42249-009 Revision 1.8 June 2011 Enterprise Platforms and Services Division – Marketing...

  • Page 2: Revision History

    Updated section 3.2.1 supported memory.  November, 2009 Corrected Post Code Diagnose LED color information.  March 2010 Added support for new board and Intel® Xeon® processors 5600 series  June 2011 Update section 10.3.6 RRL KCC(Korea) Intel order number: E42249-009 Revision 1.8...
  • Page 3 Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.

  • Page 4: Table Of Contents

    I/O Hub (IOH) 5500 chipset ................29 3.3.1 PCI Express* Gen 2 ....................30 3.3.2 Enterprise South Bridge Interface (ESI) Features ..........30 3.3.3 Controller Link (M-Link) ..................30 3.3.4 Management Engine (ME) ..................30 Intel order number: E42249-009 Revision 1.8...
  • Page 5 Server Board S5500BC TPS Table of Contents ® ® ® 3.3.5 Intel Virtualization Technology for Directed I/O (Intel VT-d) (rev. 2) ....32 ® Intel 82801Jx I/O Controller Hub (ICH10R) ............33 3.4.1 PCI and PCI Express* Interfaces ................33 3.4.2...
  • Page 6 I/O Connector Pin-out Definition ................93 6.6.1 VGA Connector ...................... 93 6.6.2 SATA II Connectors ....................94 6.6.3 Serial Port Connectors ................... 95 6.6.4 USB and GigE Connector ..................95 Fan Headers ......................97 Intel order number: E42249-009 Revision 1.8...
  • Page 7 Residual Voltage Immunity in Standby Mode ............112 9.2.16 Protection Circuits ....................113 9.2.17 Current Limit (OCP) .................... 113 9.2.18 Over Voltage Protection (OVP) ................113 9.2.19 Over Temperature Protection (OTP)..............114 10. Regulatory and Certification Information ............... 115 Revision 1.8 Intel order number: E42249-009...
  • Page 8 Appendix D: POST Code Diagnostic LED Decoder ............. 139 ® Appendix E: Intel Server System SR1630BC ..............143 ® Appendix F: Supported Intel Server Chassis SC5650 and Intel® Server System SC5650BCDP ........................... 144 Glossary ........................... 145 Reference Documents ......................148 viii Intel order number: E42249-009...
  • Page 9 Figure 12. Functional Block Diagram ..................15 ® ® Figure 13. Intel IOH 5500 Chipset with Intel QuickPath Interconnect Block Diagram ..... 17 Figure 14. ILM Backplate and URS .................... 22 Figure 15. DIMM Organization ....................26 Figure 16. Channel slots Configuration ..................27 Figure 17.
  • Page 10 Figure 46. Output Voltage Timing ..................... 111 Figure 47. Turn On/Off Timing (Power Supply Signals) ............112 Figure 48. Diagnostic LED Placement Diagram ............... 139 ® Figure 49. 1U Intel Server System SR1630BC Overview ............143 ® Figure 50. 5U Intel Entry Server Chassis SC5650 Overview ..........
  • Page 11 Table 6. Mixed Processor Configurations ................... 18 Table 7. Supported DDR3 Memory ..................... 23 Table 8. Memory Operating Frequency Determination for Intel® processor 5500 series ... 24 Table 9. Memory Operating Frequency Determination for Intel® processor 5600 series and 1.5V Memory Modules ........................
  • Page 12 Table 61. System Status LED Indicator States ................. 103 Table 62. DIMM LEDs Indicator States ..................104 Table 63. Fan LED Indicator States ..................104 Table 64. Server Board Design Specifications ................. 105 Table 65. 400W Load Ratings ....................107 Intel order number: E42249-009 Revision 1.8...
  • Page 13 Table 78. POST Error Messages and Handling ................ 135 Table 79. POST Error Beep Codes ..................138 Table 80. POST Progress Code LED Example ................ 139 Table 81. Diagnostic LED POST Code Decoder ..............140 Revision 1.8 Intel order number: E42249-009 xiii...
  • Page 14 List of Tables Intel Server Board S5500BC TPS ® < This page intentionally left blank. > Intel order number: E42249-009 Revision 1.8...

  • Page 15: Introduction

    Intel Server Boards support add-in peripherals and contain high-density VLSI and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components.

  • Page 16: Product Overview

    2.1 Feature Set Table 1: Feature Description Feature Description ® ® Processors LGA 1366 sockets supporting up to two Intel Xeon processor 5500 series and 5600 ® series with Intel QuickPath Interconnect (QPI) and Integrated Memory controllers. Memory Eight DDR3 DIMM slots supporting DDR3 800/1066/1333 MT/s ECC Registered DIMM and ECC unbuffered DIMM.
  • Page 17 Intel® IOH 5500 chipset.  One 82567 Gigabit Network Connection that connects to the Gigabit LAN Connect Interface / LAN Connect Interface on the Intel® ICH10R.  Two 10/100/1000 Base-TX Interfaces through RJ-45 connectors with integrated magnetics.

  • Page 18: Server Board Layout

    2.2.1 Server Board Connector and Component Layout Figure 2 shows the board layout of the server board. Each connector and major component is identified by a number or letter, and a description is below the figure. Intel order number: E42249-009 Revision 1.8...

  • Page 19: Figure 2. Intel ® Server Board S5500Bc Layout

    DIMM sockets for Channel A & B (Supports CPU_1) Power Supply Auxiliary Connector SSI 24-pin Front Panel connector System fan 2 header CPU_1 fan header CPU Power Connector ® CPU_1 Socket Intel IOH 5500 chipset Revision 1.8 Intel order number: E42249-009...

  • Page 20: Server Board Mechanical Drawing

    System fan 1 header DIMM sockets for Channels D and E (Supports CPU_2) SATA SGPIO SATA 0 SATA 1 SATA 2 2.2.2 Server Board Mechanical Drawing Figure 3. Key Connector and LED Indicator Identification Intel order number: E42249-009 Revision 1.8...

  • Page 21: Figure 4. Mounting Hole Location

    Intel Server Board S5500BC TPS Product Overview ® Figure 4. Mounting Hole Location Revision 1.8 Intel order number: E42249-009...

  • Page 22: Figure 5. Major Connector Pin-1 Locations

    Product Overview Intel Server Board S5500BC TPS ® Figure 5. Major Connector Pin-1 Locations Intel order number: E42249-009 Revision 1.8...

  • Page 23: Figure 6. Intel ® Server Board S5500Bc Board Primary Side Keepouts

    Intel Server Board S5500BC TPS Product Overview ® ® Figure 6. Intel Server Board S5500BC Board Primary Side Keepouts Revision 1.8 Intel order number: E42249-009...

  • Page 24: Figure 7. Intel ® Server Board S5500Bc Board Primary Side Card-Side Keepout Zone

    Product Overview Intel Server Board S5500BC TPS ® ® Figure 7. Intel Server Board S5500BC Board Primary Side Card-Side Keepout Zone Intel order number: E42249-009 Revision 1.8...

  • Page 25: Figure 8. Secondary Side Keepout -- Mounting Hole Keepout

    Intel Server Board S5500BC TPS Product Overview ® Figure 8. Secondary Side Keepout -- Mounting Hole Keepout Revision 1.8 Intel order number: E42249-009...

  • Page 26: Figure 9. Secondary Side Keepout - Cpu Socket And Rubber Pad Keepout

    Product Overview Intel Server Board S5500BC TPS ® Figure 9. Secondary Side Keepout - CPU Socket and Rubber Pad Keepout Intel order number: E42249-009 Revision 1.8...

  • Page 27: Intel ® Light-Guided Diagnostic Led Locations

    System Fan 3 Fault LED 5 VSB LED DIMM Fault LED System Fan 2 Fault LED CPU 1 Fan Fault LED CPU 2 Fan Fault LED System Fan 1 Fault LED DIMM Fault LED Revision 1.8 Intel order number: E42249-009...

  • Page 28: External I/O Connector Locations

    2.2.4 External I/O Connector Locations Figure 11. External I/O Layout Table 4. External I/O Layout Reference Description Description Serial Port A Video USB Port 6-7 USB Port 8-9 NIC Port 1 NIC Port 2 (management port) Intel order number: E42249-009 Revision 1.8...

  • Page 29: Functional Architecture

    Functional Architecture ® 3. Functional Architecture ® ® The architecture and design of the Intel Server Board S5500BC is based on the Intel 5500 ® ® chipset and the Intel Xeon processor 5500 series and 5600 series. This chapter provides a high-level description of the functionality associated with each chipset component and architectural blocks that make up this server board.

  • Page 30: Intel ® Quickpath Interconnect (Qpi)

    ® Intel QuickPath Interconnect (QPI) is a cache-coherent, link-based interconnect specification ® developed by Intel to connect processor, chipset and I/O bridge components. The Intel ® 5500 chipset is the first dual-processor server/workstation platform to implement Intel ® QuickPath Interconnect links. Figure 13 provides a platform overview of the Intel IOH 5500 ®...

  • Page 31: Processor Population Rules

    (highest common speed) and an error is reported.  You can mix processor stepping within a common processor family as long as it is listed in the processor specification updates published by Intel Corporation. Revision 1.8 Intel order number: E42249-009...

  • Page 32: Table 6. Mixed Processor Configurations

    The following table describes mixed processor conditions and recommended actions for all ® ® Intel server boards and systems that use the Intel IOH chipset. Errors fall into one of two categories:  Fatal: If the system can boot, it goes directly to the error manager, regardless of the ―Post Error Pause‖...

  • Page 33: Multiple Processor Initialization

    ® ® The Intel Server Board S5500BC is a dual-socket server platform based on Intel QuickPath Interconnect replacing Front Side Bus architecture. At reset, one BSP per processor socket is selected. However, the BIOS POST Power On Self Test (POST) code requires only one processor for execution.

  • Page 34: Turbo Mode

    The SMBIOS Type 4 structure shows only the installed physical processors; it does not describe the virtual processors. ® Because some operating systems cannot efficiently use the Intel HT Technology, the BIOS does not create entries in the Multi-Processor Specification, Version 1.4 tables to describe the virtual processors.

  • Page 35: Independent Loading Mechanism (Ilm) Back Plate Design Support

    ® 3.1.8 Independent Loading Mechanism (ILM) Back Plate Design Support ® Server board S5500BC complies with Intel‘s Independent Loading Mechanism (ILM) The Intel processor mounting and Unified Retention System (URS) heatsink retention solution. The ILM design allows a bottoms-up assembly of the components to the board. The unified back plate for dual-processor server products consists of a flat steel back plate with threaded studs for ILM attachment, and internally threaded nuts for attaching the heatsink.

  • Page 36: Memory Subsystem

    Xeon processors 5500 series and 5600 series have an Integrated Memory ® Controller (IMC). The Intel Server Board S5500BC memory interface supports two DDR3 channels. Each channel consists of 64 data and 8 ECC bits. The IMC provides DDR3 channels Intel order number: E42249-009 Revision 1.8...

  • Page 37: Table 7. Supported Ddr3 Memory

    5500 IOH through the Intel QPI link interface. The ® ® frequencies of the processor cores and the QPI links of Intel Xeon 5500 series and 5600 series processor are independent from each other. There are no gear-ratio requirements for the ®...

  • Page 38: Table 8. Memory Operating Frequency Determination For Intel® Processor 5500 Series

    A single QR RDIMM on a channel is limited to 1066 MHz. In addition, rules in the following table also determine the global common memory system frequency. Table 8. Memory Operating Frequency Determination for Intel® processor 5500 series IMC Frequency of Installed Processors Ranks Per...

  • Page 39: Table 9. Memory Operating Frequency Determination For Intel® Processor 5600 Series And 1.5V Memory Modules

    Intel Server Board S5500BC TPS Functional Architecture ® Table 9. Memory Operating Frequency Determination for Intel® processor 5600 series and 1.5V Memory Modules IMC Frequency of Installed Processors (1333MHz, 1066MHz, Ranks Per or 800MHz) DIMM 1333MHz SR: Single-Rank 1066MHz DR: Dual-Rank;...

  • Page 40: Dimm Population Requirements

    A of node 1. DIMM_D1 is the first DIMM socket on channel D of node 2. ® ®  You must populate the memory slots for each DDR3 channel from the Intel Xeon 5500 processor series and 5600 series on a farthest first fashion. This also holds true for Independent Channel mode.

  • Page 41: Memory Upgrade Guidelines

     The DDR3 DIMM characteristics. ® ®  The optimization techniques used by the Intel Xeon processor 5500 series and 5600 series to maximize memory bandwidth. In Independent Channel Mode all DDR3 channels operate independently. Slot-to-slot DIMM matching is not required across channels. For example, DIMM_A1 and DIMM_B1 do not have to match in terms of size, organization, and timing.

  • Page 42: Memory Ras Features

    When installing memory, you must populate first the memory slot that is the farthest away in the channel for each processor (refer to the ―Channel Slots Configuration‖ figure), even for Independent Channel mode. Therefore, you cannot populate/use DIMM_A2 if DIMM_A1 is empty. Intel order number: E42249-009 Revision 1.8...

  • Page 43: Channel Mirroring Mode

    Patrol scrubs are intended to ensure that data with a correctable error does not remain in ® DRAM long enough to cause further corruption and an uncorrectable particle error. The Intel QuickPath Memory Controller issues a Patrol Scrub at a rate sufficient to write every line once a day.

  • Page 44: Pci Express* Gen 2

     Power Management Support ® ®  Intel Virtualization Technology for Directed I/O (Intel VT-d), Second Revision for server security.  Integrated IOxAPIC 3.3.1 PCI Express* Gen 2 PCI Express* generation 1 and 2 are dual simplex, point-to-point serial differential low voltage interconnect.
  • Page 45 Server Platform Services (SPS) offers a means for a BMC without a PECI 2.0 interface to use the ME as a PECI proxy. The BMC on Intel servers already has a PECI 2.0 interface, so this SPS capability is not used.

  • Page 46: Intel ® Virtualization Technology For Directed I/O (Intel ® Vt-D) (Rev. 2)

    Virtualization Technology for Intel IA-32 Architecture or Intel VT-x) adds hardware support in the processor to improve the virtualization performance and ® robustness. The second revision of this specification (Intel VT-d) adds a chipset hardware implementation to improve I/O performance and robustness. ®...

  • Page 47: Intel ® 82801Jx I/O Controller Hub (Ich10R)

    ICH10R provides a 33MHz, 3.3 V PCI interface implementation. All PCI signals are ® 5-V tolerant except PME#. The Intel Server Board S5500BC provides one slot for legacy PCI devices. This 5-V keyed slot can support Universal or legacy 5-V keyed PCI 32-bit / 33MHz add- in cards.

  • Page 48: Software Raid Support

    RAID 5, you place this activation key on the SATA Key connector located on the right ® side of the server board. For information on how to install the Intel RAID Activation Key AXXRAKSW5 accessory to enable RAID 5, see the documentation included with the accessory kit.

  • Page 49: Serial Peripheral Interface (Spi)

    ® ICH10R‘s port-routing logic determines whether a USB port is low-speed capable. Intel ® controlled by one of the UHCI or EHCI controllers. Ten ports are used on the Intel server board S5500BC as outlined:  Four ports are connected to dual USB + RJ-45 stacked external connectors on the rear panel.

  • Page 50: Manageability

    ICH10R Interfaces ® ® The Intel Server Board S5500BC does not support the following interfaces on the Intel ICH10R: An Audio Codec (AC) ‘97 Component Specification, Version 2.3 controller that can be  used to attach an AC, Modem Codec (MC), Audio/Modem Codec (AMC), or a combination of ACs and a single MC.

  • Page 51: Intel ® 82574L Gbe Pci-E Network Controller

    100 Mb/s transfer rate. 32 KB of on-chip buffering mitigates instantaneous receive bandwidth demands and eliminates transmit under-runs by ® buffering the entire outgoing packet prior to transmission. The Intel 82574L GbE PCI-E Network controller supports the following features: ...

  • Page 52: Intel ® 82567 Gigabit Network Connection Physical Layer Transceiver (Phy)

    82567 Gigabit Network Transceiver is a single-port Gigabit Network Layer Transceiver (PHY) that connects to the Media Access Controller (MAC) through a dedicated interconnect. The 82567 Gigabit Network Transceiver is based on Intel‘s Gigabit Network PHY ® technology, and supports operation at data rates of 10/100/1000 Mb/s. The Intel...
  • Page 53 Programmable IO Port snooping, which can be used to snoop on Port 80h  Unique Chip ID for each part (burned at the time production testing)  Hardware 32-bit Random Number generator  JTAG Master interface  On-Chip Test Infrastructure for testing BMC firmware Revision 1.8 Intel order number: E42249-009...
  • Page 54 DDR2 memory interface supports up to 128 MB of memory  Supports all display resolutions up to 1600 x 1200 16bpp @ 75Hz  High-speed Integrated 24-bit RAMDAC  Single lane PCI-Express* host interface Intel order number: E42249-009 Revision 1.8...

  • Page 55: Integrated Bmc Embedded Lan Channel

    Interface 2: This interface is available from RMM3 which is dedicated management NIC and not shared with host. For these channels, you can enable support for IPMI-over-LAN and DHCP. For security reasons, embedded LAN channels have the following default settings:  IP Address: Static Revision 1.8 Intel order number: E42249-009...

  • Page 56: Video Support

    Intel Server Board S5500BC TPS ®  All users disabled ® For more information about BMC IP address configuration, refer to the Intel S5500 Chipset Server Board Baseboard Management Controller Core External Product Specification. 3.7 Video Support ® The Intel Server Board S5500BC includes a video controller in the onboard ServerEngines* LLC Pilot II BMC and 8 MB of video DDR2 SDRAM.

  • Page 57: Keyboard And Mouse Support

    3.12 System Health Support The BMC provides an interface from the GPIOs (General Purpose Input/Output) for BIOS and system management firmware to activate the diagnostic LEDs, FRU fault indicator LEDs for DIMMs, fans, and system status LED. Revision 1.8 Intel order number: E42249-009...

  • Page 58: Platform Management

    ® 4. Platform Management ® The Platform Management subsystem on the Intel Server Board S5500BC consists of a Baseboard Management Controller (BMC), server management buses, sensors, server management firmware, and system BIOS. The BMC is provided by ServerEngines* Pilot II integrated Baseboard Management Controller (Integrated BMC).

  • Page 59: Figure 18. Smbus Block Diagram

    Intel Server Board S5500BC TPS Platform Management ® Figure 18. SMBUS Block Diagram Revision 1.8 Intel order number: E42249-009...

  • Page 60: Feature Support

    Fault resilient booting (FRB): FRB2 is supported by the watchdog timer functionality  Chassis intrusion detection and chassis intrusion cable presence detection.  Basic fan control using T-Control version 2 SDRs.  Fan redundancy monitoring and support. Intel order number: E42249-009 Revision 1.8...

  • Page 61: Advanced Management Feature Support

    ® The Intel RMM3 provides the BMC with an additional dedicated network interface. The ® dedicated interface will consume its own LAN channel. Additionally, the Intel RMM3 will provide additional flash storage for advanced features like WS-MAN. Revision 1.8 Intel order number: E42249-009...

  • Page 62: Keyboard, Video, Mouse (Kvm) Redirection

    It is possible to boot all supported priority one operating systems such as Microsoft Windows* and Linux* operating systems from the remotely mounted device and to boot from disk IMAGE (*.IMG) files.  It is possible to mount at least two devices concurrently. Intel order number: E42249-009 Revision 1.8...

  • Page 63: Availability

    RMM3 is present. IPMI User Management – Limited access based on IPMI user privilege.  The web server is available on all enabled LAN channels. See Appendix B for Integrated BMC core sensors. Revision 1.8 Intel order number: E42249-009...

  • Page 64: Console Redirection

    BIOS setup. 4.3.1 Serial Configuration Settings ® For optimal configuration of Serial Over LAN (SOL) or EMP, see Intel Server System Integrated Baseboard Management Controller Core External Product Specification. The BIOS does not require that the splash logo be turned off for console redirection to function.

  • Page 65: Node Manager

    Management Engine (ME). 4.4.2 Command Bridging The majority of BMC functionality to support the NM is handled by bridging commands and alerts. The ME participating in Node Management acts as a satellite controller on the BMC‘s Revision 1.8 Intel order number: E42249-009...

  • Page 66: External Communications Link

    ME. As part of this command transaction to the ME, the BMC also provides the total number of installed CPUs, the Icc_TDC value for each CPU (retrieved by the BMC via PECI), and a notification that POST has completed. Intel order number: E42249-009 Revision 1.8...

  • Page 67: Acpi Mode Notification

    Bus (PMBus) 1.1 Specification. The following sensor types are supported for systems that contain PMBus-compliant power supplies and a PMBus-compliant power distribution board.  Power Supply Input Power Sensor  Power Supply Output Current Sensor  Power Supply Temperature Sensor Revision 1.8 Intel order number: E42249-009...

  • Page 68: Bios Setup Utility

     Platform name  Total memory detected (total size of all installed DDR-3 DIMMs).  Processor information (Intel branded string, speed, and number of physical processors identified).  Keyboards detected, if plugged in.  Mouse devices detected, if plugged in.

  • Page 69: Table 14. Bios Setup Page Layout

    5.3.1.2 Entering BIOS Setup To enter the BIOS Setup, press the F2 function key during boot time when the OEM or Intel logo displays. The following message displays on the diagnostics screen and under the Quiet Boot logo screen: Press <F2>...

  • Page 70: Table 15. Bios Setup: Keyboard Command Bar

    If ―Yes‖ is highlighted and <Enter> is pressed, all changes are saved and the Setup is exited. If ―No‖ is highlighted and <Enter> is pressed, or the <Esc> key is pressed, the user is returned to where they were before <F10> was pressed without affecting any existing values. Intel order number: E42249-009 Revision 1.8...

  • Page 71: Server Platform Setup Utility Screens

    5.3.2.1 Main Screen The Main screen is the first screen displayed when the BIOS Setup is entered, unless an error occurred. If an error occurred, the Error Manager screen displays instead. Revision 1.8 Intel order number: E42249-009...

  • Page 72: Figure 19. Setup Utility - Main Screen Display

    Platform ID. System BIOS Version Information only. Displays the current BIOS version. xx = major version yy = minor version zzzz = build number Build Date Information only. Displays the current BIOS build date. Memory Intel order number: E42249-009 Revision 1.8...
  • Page 73 Configurations are performed on the selected screen, and not directly on the Advanced screen. To access this screen from the Main screen, press the right arrow until the Advanced screen is selected. Revision 1.8 Intel order number: E42249-009...

  • Page 74: Figure 20. Setup Utility - Advanced Screen Display

    This screen also allows the user to view information about a specific processor. To access this screen from the Main screen, select Advanced > Processor. Intel order number: E42249-009 Revision 1.8...

  • Page 75: Figure 21. Setup Utility - Processor Configuration Screen Display

    Table 18. Setup Utility — Processor Configuration Screen Fields Setup Item Options Help Text Comments Processor ID Information only. Processor CPUID. Processor Frequency Information only. Current frequency of the processor. Core Frequency Information only. Frequency at which the processors are currently running. Revision 1.8 Intel order number: E42249-009...
  • Page 76 ® Enabled Enable/Disable Intel Virtualization ® Intel Virtualization Technology for Directed I/O. Disabled Technology for Directed Report the I/O device assignment to VMM through DMAR ACPI Tables Intel order number: E42249-009 Revision 1.8...
  • Page 77 Server Board S5500BC TPS BIOS Setup Utility ® Setup Item Options Help Text Comments ® ® Enable/Disable Intel VT-d Interrupt Only appears when Intel Interrupt Remapping Enabled Remapping support. Virtualization Technology for Disabled Directed I/O is enabled. ® ® Enabled Enable/Disable Intel...

  • Page 78: Figure 22. Setup Utility - Memory Configuration Screen Display

    RAS redundancy and SMRAM. This difference includes the sum of all DDR-3 DIMMs that failed Memory BIST during POST, or were disabled by the BIOS during memory discovery phase in order to optimize memory configuration. Intel order number: E42249-009 Revision 1.8...
  • Page 79 The Configure Memory RAS and Performance screen allows the user to customize several memory configuration options, such as whether to use Memory Mirroring or Memory Sparing. To access this screen from the Main screen, select Advanced > Memory > Configure Memory RAS and Performance. Revision 1.8 Intel order number: E42249-009...

  • Page 80: Figure 23. Setup Utility - Configure Ras And Performance Screen Display

    5.3.2.2.3 Mass Storage Controller Screen The Mass Storage screen allows the user to configure the SATA/SAS controller when it is present on the baseboard, midplane, or backplane of an Intel system. To access this screen from the Main menu, select Advanced > Mass Storage.

  • Page 81: Figure 24. Setup Utility - Mass Storage Controller Configuration Screen Display

    Intel Server Board S5500BC TPS BIOS Setup Utility ® Advanced Mass Storage Controller Configuration Intel(R) Entry SAS RAID Module Enabled / Disabled Configure Intel(R) Entry SAS RAID ® ® Module Integrated RAID / Intel ESRTII Onboard SATA Controller Enabled / Disabled...
  • Page 82 5.3.2.2.4 Serial Ports Screen The Serial Ports screen allows the user to configure the Serial A [COM 1] and Serial B [COM2] ports. To access this screen from the Main screen, select Advanced > Serial Port. Intel order number: E42249-009 Revision 1.8...

  • Page 83: Figure 25. Setup Utility - Serial Port Configuration Screen Display

    Select Serial port B interrupt request (IRQ) line. 5.3.2.2.5 USB Configuration Screen The USB Configuration screen allows the user to configure the USB controller options. To access this screen from the Main screen, choose Advanced > USB Configuration. Revision 1.8 Intel order number: E42249-009...

  • Page 84: Figure 26. Setup Utility - Usb Controller Configuration Screen Display

    Enabled I/O port 60h/64h emulation support. Grayed out if the USB Controller is Emulation disabled. Disabled Note: This may be needed for legacy USB keyboard support when using an OS that is USB unaware. Intel order number: E42249-009 Revision 1.8...
  • Page 85 5.3.2.2.6 PCI Screen The PCI Screen allows the user to configure the PCI add-in cards, onboard NIC controllers, and video options. To access this screen from the Main screen, select Advanced > PCI. Revision 1.8 Intel order number: E42249-009...

  • Page 86: Figure 27. Setup Utility - Pci Configuration Screen Display

    Disabled the NIC1 or NIC2 ROMs are enabled. Warning: If [Disabled] is selected, NIC1 and NIC2 cannot be used to boot or wake the system. Intel order number: E42249-009 Revision 1.8...

  • Page 87: Figure 28. Setup Utility - System Acoustic And Performance Configuration Screen Display

    Optimal performance setting at moderate elevation. Higher than 1500m [901m – 1500m] (2950ft – 4920ft) Optimal performance setting at high elevation. [Higher than 1500m] (4920ft or greater) Optimal performance setting at the highest elevations. Revision 1.8 Intel order number: E42249-009...

  • Page 88: Figure 29. Setup Utility - Security Configuration Screen Display

    Options Help Text Comments Administrator Password <Installed Information only. Indicates Status the status of the Not Installed> administrator password. User Password Status <Installed Information only. Indicates the status of the user Not Installed> password. Intel order number: E42249-009 Revision 1.8...
  • Page 89 Clear Ownership TPM. [Clear Ownership] - Removes the TPM ownership authentication and returns the TPM to a factory default state. Note: The BIOS setting returns to [No Operation] on every boot cycle by default. Revision 1.8 Intel order number: E42249-009...

  • Page 90: Figure 30. Setup Utility - Server Management Configuration Screen Display

    System action to take on AC power loss recovery. Loss [Stay Off] - System stays off. Last state Reset [Last State] - System returns to the same state before the AC power loss. [Reset] - System powers on. Intel order number: E42249-009 Revision 1.8...
  • Page 91 Disabled complete booting before the timer expires, the BMC resets the system and an error is logged. Requires OS support or Intel Management Software. O/S Boot Watchdog Power Off If the OS boot watchdog timer is enabled, this is the...

  • Page 92: Figure 31. Setup Utility - Console Redirection Screen Display

    If it is enabled, the associated serial Enabled port is hidden from the legacy OS. 5.3.2.5 Server Management System Information Screen The Server Management System Information screen allows the user to view part numbers, serial numbers, and firmware revisions. Intel order number: E42249-009 Revision 1.8...

  • Page 93: Figure 32. Setup Utility - Server Management System Information Screen Display

    5.3.2.6 Boot Options Screen The Boot Options screen displays any bootable media encountered during POST, and allows the user to configure desired boot device. To access this screen from the Main screen, choose Boot Options. Revision 1.8 Intel order number: E42249-009...

  • Page 94: Figure 33. Setup Utility - Boot Options Screen Display

    These settings are in Valid values are 0-65535. Zero is the seconds. default. A value of 65535 causes the system to go to the Boot Manager menu and wait for user input for every system boot. Intel order number: E42249-009 Revision 1.8...
  • Page 95 If all types of bootable devices are installed in the system, then the default boot order is: 1. CD/DVD-ROM 2. Floppy Device 3. HDD Device 4. PXE device 5. BEV (Boot Entry Vector) Device 6. EFI Shell Revision 1.8 Intel order number: E42249-009...

  • Page 96: Figure 34. Setup Utility - Add New Boot Option Screen Display

    To access this screen from the Main screen, select Boot Options > Delete Boot Options.  Boot Options  Delete Boot Option Delete Boot Option Select one to Delete / Internal EFI Shell Figure 35. Setup Utility — Delete Boot Option Screen Display Intel order number: E42249-009 Revision 1.8...

  • Page 97: Figure 36. Setup Utility - Hard Disk Order Screen Display

    To access this screen from the Main screen, choose Boot Options > CDROM Order.  Boot Options  CDROM <Available CDROM devices> CDROM <Available CDROM devices> Figure 37. Setup Utility — CDROM Order Screen Display Revision 1.8 Intel order number: E42249-009...

  • Page 98: Figure 38. Setup Utility - Floppy Order Screen Display

    5.3.2.6.6 Network Device Order Screen The Network Device Order screen allows the user to control the network bootable devices. To access this screen from the Main screen, select Boot Options > Network Device Order. Intel order number: E42249-009 Revision 1.8...

  • Page 99: Figure 39. Setup Utility - Network Device Order Screen Display

    Set system boot order by selecting the boot Legacy devices option for this position. for this Device group. BEV Device #2 Available Set system boot order by selecting the boot Legacy devices option for this position. for this Device group. Revision 1.8 Intel order number: E42249-009...

  • Page 100: Figure 41. Setup Utility - Boot Manager Screen Display

    INSTANCE Figure 42. Setup Utility — Error Manager Screen Display Table 39. Setup Utility — Error Manager Screen Fields Setup Item Comments Displays System Errors Information only. Displays errors that occurred during the POST. Intel order number: E42249-009 Revision 1.8...

  • Page 101: Figure 43. Setup Utility - Exit Screen Display

    Changes operation was performed. if any of the setup fields were modified. Load Default Values Load factory default values for all BIOS Setup User is prompted for confirmation. utility options. The [F9] key can also be used. Revision 1.8 Intel order number: E42249-009...

  • Page 102: Loading Bios Defaults

    1. Power down the system (Do not remove AC power). 2. Move the Clear CMOS jumper from pins 1-2 to pins 2-3. 3. Move the Clear CMOS jumper from pins 2-3 to pins 1-2. 4. Power up the system. Intel order number: E42249-009 Revision 1.8...

  • Page 103: Connector / Header Locations And Pin-Outs

    J5A1 J6A1 J7A1 Connector Serial Port J8A1 DB-9 rear connector J9A1 2x5 Header GigE J5A1 USB/LAN combo connector J6A1 Front Panel J9E2 Header SATA Key J7B1 Header Intrusion Detect J8B3 Header Battery Battery Holder Revision 1.8 Intel order number: E42249-009...

  • Page 104: Power Connectors

    Gray 5VSB Purple +12V Yellow +12V Yellow +3.3V Orange Black Table 43. EPS12V 2x4 Connector (J7K1) Signal Name Color Signal Name Color Black +12V Yellow Black +12V Yellow Black +12V Yellow Black +12V Yellow Intel order number: E42249-009 Revision 1.8...

  • Page 105: Riser Card Slot

    JTAG3 INTRU# 3.3V JTAG5 JTAG1 3.3V 3.3VAux 3.3V WAKE# PERST# 3.3V REFCLK1+ PETxP0 REFCLK1- PETxN0 PERxP0 PRSNT2# PERxN0 PETxP1 3.3V PETxN1 PERxP1 PERxN1 PETxP2 PETxN2 PERxP2 PERxN2 PETxP3 PETxN3 PERxP3 3.3V PERxN3 PRSNT2# PETxP4 Revision 1.8 Intel order number: E42249-009...

  • Page 106: Rmm3 Connector

    WS-MAN. The following table shows the pin-out settings for this connector. Table 46. RMM3 Connector Pin-out (J3C1) Signal Name Signal Name P3V3 RMI_IBMC_MAC_MDIO P3V3 RMII_IBMC_MAC_MDC RMII_IBMC_GCM4_RXD<1> RMII_IBMC_GCM4_RXD<0> RMII_IBMC_GCM4_CRS_DV CLK_50M_GCM4 RMII_IBMC_GCM4_RX_ER RMII_IBMC_GCM4_TX_EN RMII_IBMC_GCM4_TXD<0> RMII_IBMC_GCM4_TXD<1> P3V3 SPI_IBMC_BK_CS_N P3V3 TP_GCM4_P26 P3V3 SPI_IBMC_BK_DO SPI_IBMC_BK_CLK SPI_IBMC_BK_DI FM_GCM4_PRSNT_N Intel order number: E42249-009 Revision 1.8...

  • Page 107: Ssi Front Panel Connector

    Server Board S5500BC provides a 24-pin SSI control panel connector (J9E2) for use with a non-Intel chassis. Several LEDs, such as the power status LED, HDD LED, and LAN status LED, are provided on the front panel to provide a visual status. The following table provides the pin-out information for this connector.

  • Page 108: Sata Ii Connectors

    Signal Name Description GND1 SATA#_TX_P_C Positive side of transmit differential pair SATA#_TX_N_C Negative side of transmit differential pair GND2 SATA#_RX_N_C Negative side of Receive differential pair SATA#_RX_P_C Positive side of Receive differential pair GND3 Intel order number: E42249-009 Revision 1.8...

  • Page 109: Serial Port Connectors

    ® ® The Intel ICH10R I/O Controller Hub on the Intel Server Board S5500BC supports eleven USB ports. Four ports are connected to two USB+RJ-45 NIC stacked connectors on the rear panel of the server board. The following table lists the pin-out information for the external USB connectors (J5A1, J6A1).

  • Page 110: Table 52. External Usb And Gbe Connector Pin-Out (J5A1, J6A1)

    GRN_A GRN_C/YEL_A GRN_A/YEL_C ® Four ports are connected to the two 2x5 headers (J1A3, J2A2) on the Intel Server Board S5500BC. The following table provides the pin-out information for the header. The two headers are identical. Table 53. Internal USB Header Pin-out (J1A3, J2A2)

  • Page 111: Fan Headers

    Intel designs the chassis to meet the intended thermal requirements of these components when the fully integrated system is used together. If Intel server building blocks are not used in the system, it is the responsibility of the system integrator to consult vendor datasheets and operating parameters for the air flow requirements for their specific application and environmental conditions.

  • Page 112: Sgpio Header

    Table 56. Chassis Intrusion connector Pin-out (J8B3) Output Signal Name To BMC FM_IBMC_INTRUDER_HDR_N To FP FM_IBMC_INTRUDER_HDR 6.10 SMB Hot-Swap Backplane (HSBP) Header Table 57. SMB HSBP connector Pin-out (J9B1) Signal Name SMB_HSBP_5V_DAT SMB_HS BP_5V_CLK P5V Pull-up Intel order number: E42249-009 Revision 1.8...

  • Page 113: Sata Raid Key Header

    Connector / Header Locations and Pin-outs ® 6.11 SATA RAID Key Header Table 58. SATA connector Pin-out (J7B1) Signal Name FM_ICH_RAID_KEY 6.12 IPMB Header Table 59. IPMB Connector Pin-out (J8B1) Signal Name SMB_IPMB_5VSB_DAT SMB_IPMB_5VSB_CLK P5V_STBY Revision 1.8 Intel order number: E42249-009...

  • Page 114: Jumper Block Settings

    Server Board S5500BC has several jumper blocks that you can use to configure, recover, or enable /disable specific features of the server board. Pin 1 on each jumper block is denoted by ―▼‖. Figure 44. Jumper Blocks Intel order number: E42249-009 Revision 1.8...

  • Page 115: Table 60. Jumper Block Matrix

    Note: The system will boot from EFI-bootable recovery media with a recovery BIOS image. J8B5: ME Force Update These pins should have a jumper in place for normal system operation. (Default) ME force update model. Revision 1.8 Intel order number: E42249-009...

  • Page 116: Intel Light-Guided Diagnostics

    Several server management features on the Intel Server Board S5500BC require a 5-volt stand-by from the power supply. The features and components that require this voltage be present when the system is ―Off‖ include the Integrated BMC, onboard NICs, and optional Intel ® ®...

  • Page 117: Dimm Fault Leds

    Figure 10 for the LEDs‘ location. The DIMM fault LED is illuminated when the system BIOS disables a DIMM when it reaches a specified number of failures or if specific critical DIMM failures are detected. Revision 1.8 Intel order number: E42249-009...

  • Page 118: Fan Fault Leds

    POST code numbers. As each configuration routine is started, the BIOS displays ® the POST code on the POST code diagnostic LEDs on the back edge of the Intel Server Board S5500BC. The diagnostic LEDs can identify the last POST process executed to help troubleshoot a system hang during POST.

  • Page 119: Power And Environmental Specifications

    Intel server building blocks, the integrated system will meet component thermal requirements. If Intel components are not installed, it is the responsibility of the system integrator to consult vendor datasheets and operating parameters to determine the air flow requirements for their specific application and environmental conditions.

  • Page 120: Figure 45. Power Distribution Block Diagram

    Power and Environmental Specifications Intel Server Board S5500BC TPS ® Figure 45. Power Distribution Block Diagram Intel order number: E42249-009 Revision 1.8...

  • Page 121: Output Power / Currents

    The power supply shall be provided with a reliable protective earth ground. All secondary circuits shall be connected to protective earth ground. Resistance of the ground returns to chassis shall not exceed 1.0 m. This path may be used to carry DC current. Revision 1.8 Intel order number: E42249-009...

  • Page 122: Standby Outputs

    The power supply fans must continue to operate at their lowest speed when in standby mode. 9.2.7 Voltage Regulation The power supply output voltages must remain within the following limits when operating at steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise. Intel order number: E42249-009 Revision 1.8...

  • Page 123: Dynamic Loading

    The power supply should be unconditionally stable under all line/load/transient load conditions, including capacitive load ranges. A minimum of 45° phase margin and -10 dB gain margin is required. The power supply manufacturer should provide proof of the unit‘s closed-loop stability Revision 1.8 Intel order number: E42249-009...

  • Page 124: Common Mode Noise

    400msec (Tvout_off) of each other during turn off. shows the timing requirements for the power supply being turned on and off via the AC input, with PSON held low and the PSON signal, with the AC input applied. Intel order number: E42249-009 Revision 1.8...

  • Page 125: Figure 46. Output Voltage Timing

    Delay from loss of AC to de-assertion of PWOK. Measured at pwok_holdup 75% of maximum load. Delay from PSOn active to output voltages within regulation pson_on_delay limits. Delay from PSOn deactive to PWOK being de-asserted. pson_pwok Revision 1.8 Intel order number: E42249-009...

  • Page 126: Residual Voltage Immunity In Standby Mode

    It should not trip the power supply protection circuits during turn on. Residual voltage at the power supply outputs for a no load condition should not exceed 100 mV when AC voltage is applied and the PSOn# signal is de-asserted. Intel order number: E42249-009 Revision 1.8...

  • Page 127: Protection Circuits

    Exception: +5VSB rail should be able recover after its over voltage condition occurs. Table 74. Over Voltage Protection (OVP) Limits Output Voltage MIN (V) MAX (V) +3.3V +12V1,2 13.3 14.5 -12V -13.3 -14.5 +5VSB Revision 1.8 Intel order number: E42249-009...

  • Page 128: Over Temperature Protection (Otp)

    5VSB remains always on. The OTP circuit must have built in hysteresis such that the power supply will not oscillate on and off due to temperature recovering condition. The OTP trip level shall have a minimum of 4C of ambient temperature hysteresis. Intel order number: E42249-009 Revision 1.8...

  • Page 129: Regulatory And Certification Information

    EMC compliance testing. For more information please contact your local Intel Representative. This is an FCC Class A device. Integration of it into a Class B chassis does not result in a Class B device.

  • Page 130: Product Emc Compliance - Class A Compliance

    Server Board S5500BC TPS ® 10.1.2 Product EMC Compliance – Class A Compliance Note: This product requires complying with Class A EMC requirements. However, Intel targets a 10 db margin to support customer enablement. CISPR 22 – Emissions (International) ...
  • Page 131 The server board complies with the following ecology regulatory requirements:  All materials, parts, and subassemblies must not contain restricted materials as defined in Intel’s Environmental Product Content Specification of Suppliers and Outsourced Manufacturers – http://supplier.intel.com/ehs/environmental.htm.  Europe - European Directive 2002/95/EC - Restriction of Hazardous Substances (RoHS) Threshold limits and banned substances are noted below.

  • Page 132: Product Regulatory Compliance Markings

    Exporting Requirements MADE IN xxxxx (Provided by label, not silk screen) Model Designation Regulatory Identification Examples (Intel® Server Board S5500BC) for boxed type boards; or Board PB number for non- boxed boards (typically high-end boards) PB Free Marking? Environmental Requirements Refer to the spec http://prodregs.intel.com/ProductCertifications/Servers/...
  • Page 133 This notice is required by California Code of (Marked on packaging Regulations, Title 22, Division 4.5, Chapter 33: Best label) Management Practices for Perchlorate Materials. This product / part includes a battery which contains Perchlorate material. Revision 1.8 Intel order number: E42249-009...

  • Page 134: Electromagnetic Compatibility Notices

    All cables used to connect to peripherals must be shielded and grounded. Operation with cables, connected to peripherals that are not shielded and grounded may result in interference to radio and TV reception. Intel order number: E42249-009 Revision 1.8...

  • Page 135: Ices-003 (Canada)

    Interference (VCCI) from Information Technology Equipment. If this is used near a radio or television receiver in a domestic environment, it may cause radio interference. Install and use the equipment according to the instruction manual. Revision 1.8 Intel order number: E42249-009...

  • Page 136: Bsmi (Taiwan)

    English translation of the notice above: 1. Type of Equipment (Model Name): On License and Product 2. Certification No.: On RRL certificate. Obtain certificate from local Intel representative 3. Name of Certification Recipient: Intel Corporation 4. Date of Manufacturer: Refer to date code on product 5.

  • Page 137: Appendix A: Integration And Usage Tips

    ® Only Intel Xeon processor 5500 series with 95 W and less Thermal Design Power ® ® (TDP) are supported on this server board. Previous generation Intel Xeon ® ® processors are not supported. Intel Xeon processor 5500 series with TDP higher than 95 W are not supported.

  • Page 138: Appendix B: Sensor Tables

    Readable Offsets indicate the offsets for discrete sensors that are readable via the Get Sensor Reading command. Unless otherwise indicated, all event triggers are readable (for example, Readable Offsets consists of the reading type offsets that do not generate events). Intel order number: E42249-009 Revision 1.8...
  • Page 139 Control Panel Status LED.  Standby Some sensors operate on standby power. These sensors may be accessed and / or generate events when the main (system) power is off, but AC power is present. Revision 1.8 Intel order number: E42249-009...

  • Page 140: Table 76. Integrated Bmc Core Sensors

    Power Unit Redundancy Power Unit Generic Chassis- – Trig Offset full redundant specific (Pwr Unit Redund) state. 04 – Non- Degraded redundant: sufficient resources. Transition from insufficient state. 05 - Non- Fatal redundant: insufficient resources Intel order number: E42249-009 Revision 1.8...
  • Page 141 SMI Timeout SMI Timeout – – Discrete asserted Fatal Trig Offset (SMI Timeout) Event Sensor Logging 02 - Log area System Event Log Specific – Trig Offset Disabled reset / cleared (System Event Log) Revision 1.8 Intel order number: E42249-009...
  • Page 142 = Degraded Voltage Threshold [u,l] [c,nc] Analog R, T (BB +3.3V STBY) c = Non-fatal BB +3.3V Vbat nc = Degraded Voltage Threshold – [u,l] [c,nc] Analog R, T (BB +3.3V Vbat) c = Non-fatal Intel order number: E42249-009 Revision 1.8...
  • Page 143 Analog R, T c = Non-fatal (Mem P2 Thrm Mrgn) only – Fan Tachometer Sensors nc = Degraded Threshold Chassis- 30h–39h [l] [c,nc] Analog R, T (Chassis specific c = Non-fatal specific sensor names) Revision 1.8 Intel order number: E42249-009...
  • Page 144 Fan Redundancy Generic Chassis- Sufficient – Trig Offset Degraded specific resources. (Fan Redundancy) Transition from redundant 04 - Non- redundant: Sufficient Degraded resources. Transition from – insufficient. 05 - Non- redundant: Fatal insufficient resources. Intel order number: E42249-009 Revision 1.8...
  • Page 145 00 - Presence 01 - Failure Degraded 02 – Predictive Sensor Degraded Power Supply 2 Status Power Supply Failure Chassis- – Specific Trig Offset specific (PS/2 Status) 03 - A/C lost Degraded 06 – Configuration error Revision 1.8 Intel order number: E42249-009...
  • Page 146 Processor 1 Thermal Temperature Threshold Margin – – – – – – Analog (P1 Therm Margin) Processor 2 Thermal Dual Temperature Threshold Margin – – – – – – processor Analog only (P2 Therm Margin) Intel order number: E42249-009 Revision 1.8...
  • Page 147 (CATERR) Digital CPU Missing Processor 01 – State Discrete – – Fatal Trig Offset Asserted (CPU Missing) Digital IOH Thermal Trip Temperature 01 – State Discrete – Fatal Trig Offset Asserted (IOH Thermal Trip) Revision 1.8 Intel order number: E42249-009...

  • Page 148: Appendix C: Post Error Messages And Handling

    Appendix C: POST Error Messages and Handling Intel® Server Board S5500BC TPS Appendix C: POST Error Messages and Handling Whenever possible, the BIOS outputs the current boot progress codes on the video screen. Progress codes are 32-bit quantities plus optional data. The 32-bit numbers include class, subclass, and operation information.

  • Page 149: Table 78. Post Error Messages And Handling

    Processor 0x cache size mismatch detected. Fatal 0193 Processor 0x stepping mismatch. Minor 0194 Processor 0x family mismatch detected. Fatal 0195 Processor 0x Intel(R) QPI speed mismatch. Major 0196 Processor 0x model mismatch. Fatal 0197 Processor 0x speeds mismatched. Fatal 0198 Processor 0x family is not supported.
  • Page 150 Appendix C: POST Error Messages and Handling Intel® Server Board S5500BC TPS Error Code Error Message Response 8529 DIMM_E2 failed Self Test (BIST). Major 852A DIMM_F1 failed Self Test (BIST). Major 852B DIMM_F2 failed Self Test (BIST). Major 8540 DIMM_A1 Disabled.
  • Page 151 The following table lists POST error beep codes. Prior to system Video initialization, the BIOS uses these beep codes to inform users of error conditions. The beep code is followed by a user- visible code on POST Progress LEDs. Revision 1.8 Intel order number: E42249-009...

  • Page 152: Table 79. Post Error Beep Codes

    Appendix C: POST Error Messages and Handling Intel® Server Board S5500BC TPS Table 79. POST Error Beep Codes Beeps Error Message POST Progress Code Description Memory error Multiple System halted because a fatal error related to the memory was detected.

  • Page 153: Appendix D: Post Code Diagnostic Led Decoder

    LED #6 LED #5 LED #4 LED #3 LED #2 LED #1 LED #0 Status Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh. Revision 1.8 Intel order number: E42249-009...

  • Page 154: Table 81. Diagnostic Led Post Code Decoder

    Appendix D: POST Code Diagnostic LED Decoder Intel® Server Board S5500BC TPS Table 81. Diagnostic LED POST Code Decoder Diagnostic LED Decoder O = On, X=Off Checkpoint Upper Nibble Lower Nibble Description Multi-use code – This POST Code is used in different contexts...
  • Page 155 0xBCh Enabling / configuring a removable media device Boot Device Selection (BDS) 0xD0 Trying to boot device selection 0 0xD1 Trying to boot device selection 1 0xD2 Trying to boot device selection 2 Revision 1.8 Intel order number: E42249-009...
  • Page 156 Appendix D: POST Code Diagnostic LED Decoder Intel® Server Board S5500BC TPS Diagnostic LED Decoder O = On, X=Off Checkpoint Upper Nibble Lower Nibble Description 0xD3 Trying to boot device selection 3 0xD4 Trying to boot device selection 4 0xD5...

  • Page 157: Appendix E: Intel Server System Sr1630Bc

    Server System SR1630BC ® ® ® The Intel Server System SR1630BC 1U server system is designed to support the Intel Server Board S5500BC. The server board and the system have features designed to support the high- density server market. ®...

  • Page 158: Appendix F: Supported Intel

    Appendix F: Supported Intel® Server Chassis SC5650 and Intel® Server System SC5650BCDPIntel® Server Board S5500BC TPS Appendix F: Supported Intel Server Chassis SC5650 and ® Intel® Server System SC5650BCDP ® The Intel Entry Server Chassis SC5650 is a 5.2U pedestal chassis designed to support the ®...

  • Page 159: Glossary

    Gunning Transceiver Logic Hot-Swap Controller Hertz (1 cycle/second) Inter-Integrated Circuit Bus ® Intel Architecture Input Buffer I/O Controller Hub ICMB Intelligent Chassis Management Bus IERR Internal Error I/O and Firmware Bridge INTR Interrupt Internet Protocol Revision 1.8 Intel order number: E42249-009...
  • Page 160 Glossary Intel® Server Board S5500BC TPS Term Definition IPMB Intelligent Platform Management Bus IPMI Intelligent Platform Management Interface Infrared In-Target Probe 1024 bytes Keyboard Controller Style Local Area Network Liquid Crystal Display Light Emitting Diode Low Pin Count Logical Unit Number...

  • Page 161: Intel Order Number: E42249-009

    Simple Network Management Protocol To Be Determined Thermal Interface Material UART Universal Asynchronous Receiver/Transmitter User Datagram Protocol UHCI Universal Host Controller Interface Coordinated Universal Time Voltage Identification Voltage Regulator Down Word 16-bit quantity Zero Insertion Force Revision 1.8 Intel order number: E42249-009...

  • Page 162: Reference Documents

    Reference Documents Intel® Server Board S5500BC TPS Reference Documents ®  Intel S5500 Chipsets Server Board BIOS External Product Specification ®  Intel S5500 Chipsets Server Board Baseboard Management Controller Core External Product Specification ®  Intel Remote Management Module 2 Technical Product Specification ...

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