Contents
1
Introduction .............................................................................................................. 9
1.1
1.1.1
1.2
Interfaces ........................................................................................................ 11
1.2.1
1.2.2
PCI Express* ......................................................................................... 12
1.2.3
1.2.4
1.2.5
Processor Graphics ................................................................................. 14
1.2.6
1.3
1.3.1
Processor Core....................................................................................... 15
1.3.2
System ................................................................................................. 15
1.3.3
Memory Controller.................................................................................. 15
1.3.4
PCI Express* ......................................................................................... 15
1.3.5
DMI...................................................................................................... 15
1.3.6
1.4
1.5
Package ........................................................................................................... 16
1.6
Terminology ..................................................................................................... 16
1.7
Related Documents ........................................................................................... 18
2
Interfaces................................................................................................................ 19
2.1
2.1.1
2.1.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.1.5
Technology Enhancements of Intel
2.1.5.1
2.1.5.2
2.1.5.3
2.1.6
2.1.7
Data Scrambling .................................................................................... 23
2.2
PCI Express* Interface....................................................................................... 24
2.2.1
2.2.1.1
2.2.1.2
2.2.1.3
2.2.2
2.2.3
PCI Express* Port................................................................................... 26
2.2.4
2.3
2.3.1
DMI Error Flow....................................................................................... 27
2.3.2
2.3.3
DMI Link Down ...................................................................................... 28
2.4
2.4.1
2.4.1.1
Datasheet, Volume 1
®
Command Overlap .................................................................... 23
Transaction Layer ..................................................................... 25
Data Link Layer ........................................................................ 25
Physical Layer .......................................................................... 25
®
FDI) ............................................. 14
®
®
Fast Memory Access (Intel
®
3