Control Sideband And Tap Signal Group Dc Specifications - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 1 01-2011 Datasheet

Table 7-8. DDR3 Signal Group DC Specifications (Sheet 2 of 2)
Symbol Parameter
DDR3 command buffer pull-up
R
ON_UP(CMD)
resistance
DDR3 command buffer pull-
R
ON_DN(CMD)
down resistance
DDR3 control buffer pull-up
R
ON_UP(CTL)
resistance
DDR3 control buffer pull-down
R
ON_DN(CTL)
resistance
V Input Low Voltage for
IL_SM_DRAMP
SM_DRAMPWROK
WROK
V Input High Voltage for
IH_SM_DRAMP
SM_DRAMPWROK
WROK
Input Leakage Current (DQ, CK)
0 V
I 0.2*V
LI DDQ
0.8*V
DDQ
V
DDQ
Input Leakage Current (CMD,
CTL)
0 V
I
LI
0.2*V
DDQ
0.8*V
DDQ
V
DDQ
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
IL
value.
3. V is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
IH
value.
4. V and V
IH
signal quality specifications.
5. This is the pull up/down driver resistance.
6. R
TERM
7. The minimum and maximum values for these signals are programmable by BIOS to one of the two sets.
8. DDR3 values are pre-silicon estimations and subject to change.
9. SM_DRAMPWROK must have a maximum of 15 ns rise or fall time over V
must be monotonic.
Table 7-9.

Control Sideband and TAP Signal Group DC Specifications

Symbol
V
IL
V
IH
V
OL
V
OH
R
ON
I
LI
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
CCIO
3. For V
IN
4. V and V
IH
signal quality specifications.
82
Min
16
16
16
16
V *.55 +0.1
DDQ
may experience excursions above V
OH
is the termination on the DIMM and in not controlled by the processor.
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Buffer on Resistance
Input Leakage Current
referred to in these specifications refers to instantaneous V
between "0" V and V . Measured when the driver is tristated.
CCIO
may experience excursions above
OH
Typ
20
20
20
20
— —
—
— —
— —
. However, input signal drivers must comply with the
DDQ
Min Max
— V * 0.3
CCIO
V * 0.7 —
CCIO
— V * 0.1
CCIO
V * 0.9 —
CCIO
23 73
— ±200
V
CCIO . However, input signal drivers must comply with the
Electrical Specifications
Max Units Notes
23 Ω
24 Ω
23 Ω
24 Ω
V *.55 – 0.1 V
DDQ
V
± 0.75
± 0.55 mA
± 0.9
± 1.4
± 0.85
mA
± 0.65
± 1.1
± 1.65
* 0.55 ±200 mV and edge
DDQ
1
Units Notes
V 2
V 2, 4
V 2
V 2, 4

A 3
.
CCIO
Datasheet, Volume 1
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