Figure 27. Intel® Server Chassis Sc1400Up 1U Sata Hsbp I2C Bus Connection Diagram - Intel SR1425BK1 - Entry Server Platform Technical Specifications

Intel® Server Chassis SC1400UP / Intel® Server Platform SR1425BK1-E
3.4.2.1.2 I2C Serial Bus Interface
The GEM424 supports two independent I2C interface ports with bus speeds of up to 400Kbits.
2
The I C core incorporates 8-bit FIFOs for data transfer buffering. The I
®
Semiconductor LM75 or equivalent I
temperature value readings to be returned to the host. The Intelligent Platform Management Bus
(IPMB) is supported through I
The figure below provides a block diagram of I
SC1400UP 1U SATA HSBP.
Figure 27. Intel® Server Chassis SC1400UP 1U SATA HSBP I2C Bus Connection Diagram
3.4.2.1.3 Temp Sensor
SC1400UP 1U SATA HSBP provides National
over-temperature detector. The host can query the LM75 at any time to read the temperature.
The temperature sensor has the I
3.4.2.1.4 Serial EEPROM
The SC1400UP 1U SATA HSBP provides an Atmel
storing the FRU information. The 24C02 provides 2048 bits of serial electrically erasable and
programmable read-only
The serial EEPROM has the I
3.4.2.1.5 External Memory Device
SC1400UP 1U SATA HSBP contains non-volatile 32K and 64K Serial EEPROM devices for
Boot and Run-Time/Configuration code storage respectively. These devices reside on the
2
GEM424's private I C bus.
Revision 1.0
2
C -based temperature sensors. This enables actual
2
C port 0.
2
C bus connection implemented on the
®
LM75 or equivalent temperature sensor with
2
C address of 0x90h on GEM424's Port 0.
®
2
C addres of 0xA6h on GEM424's Port 1.
2
C bus supports National
24C02 or equivalent serial EEPROM for
- 39 -