Intel® Server Chassis SC1400UP / Intel® Server Platform SR1425BK1-E
Output
+3.3V
+5V
12V
+5VSB
Notes
1) Step loads on each 12V output may happen simultaneously.
2) For Load Range 2 (light system loading), the tested step load size should be 60% of those listed.
6.24 Capacitive Loading
The power supply shall be stable and meet all requirements with the following capacitive
loading ranges.
Output
+3.3V
+5V
+12V
-12V
+5VSB
6.25 Closed loop stability
The power supply shall be unconditionally stable under all line/load/transient load conditions
including capacitive load ranges. A minimum of: 45 degrees phase margin and -10dB-gain
margin is required. The power supply manufacturer shall provide proof of the unit's closed-loop
stability with local sensing through the submission of Bode plots. Closed-loop stability must be
ensured at the maximum and minimum loads as applicable.
6.26 Common Mode Noise
The Common Mode noise on any output shall not exceed 350mV pk-pk over the frequency
band of 10Hz to 30MHz.
1. The measurement shall be made across a 100Ω resistor between each of DC outputs,
including ground,
at the DC power connector and chassis ground (power subsystem enclosure).
2. The test set-up shall use a FET probe such as Tektronix model P6046 or equivalent.
Revision 1.0
Table 34. Transient Load Requirements
∆ Step Load Size
Load Slew Rate
(See note 2)
5.0A
0.25 A/µsec
6.0A
0.25 A/µsec
9.0A
0.25 A/µsec
0.5A
0.25 A/µsec
Table 35. Capacitve Loading Conditions
MIN
250
400
500
1
20
Test capacitive Load
250 µF
400 µF
500 µF
20 µF
MAX
Units
2200
µF
2200
µF
2200
µF
350
µF
350
µF
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