STC micro STC8A8K64D4 Series Reference Manual page 73

STC8A8K64D4 Series Manual
P3M0 = 0x00;
P3M1 = 0x00;
P4M0 = 0x00;
P4M1 = 0x00;
P5M0 = 0x00;
P5M1 = 0x00;
P_SW2 = 0x80;
CKSEL = 0x00;
CLKDIV = 0x08;
P_SW2 = 0x00;
IRTRIM++; // Fine-tune the IRC frequency up 3 ‰ (pay attention to judging the boundary)
// IRTRIM--; // Fine-tune the IRC frequency down 3 ‰ (pay attention to judging the boundary)
while (1);
}
Assembly code
; Operating frequency for test is 24MHz
P_SW2 DATA
IRTRIM DATA
CKSEL EQU
CLKDIV EQU
HIRCCR EQU
XOSCCR EQU
IRC32KCR EQU
P0M1 DATA
P0M0 DATA
P1M1 DATA
P1M0 DATA
P2M1 DATA
P2M0 DATA
P3M1 DATA
P3M0 DATA
P4M1 DATA
P4M0 DATA
P5M1 DATA
P5M0 DATA
ORG
LJMP
ORG
MAIN:
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
0BAH
09FH
0FE00H
0FE01H
0FE02H
0FE03H
0FE04H
093H
094H
091H
092H
095H
096H
0B1H
0B2H
0B3H
0B4H
0C9H
0CAH
0000H
MAIN
0100H
SP, #5FH
P0M0, #00H
P0M1, #00H
P1M0, #00H
P1M1, #00H
P2M0, #00H
P2M1, #00H
P3M0, #00H
P3M1, #00H
P4M0, #00H
P4M1, #00H
P5M0, #00H
// Select internal IRC (default)
// Clock divided by 8
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