STC8A8K64D4 Series Manual
21.5 Example Routines
2
21.5.1 I
C is Used to Access AT24C256 in Master Mode (Interrupt Mode)
C language code
//Operating frequency for test is 11.0592MHz
#include "reg51.h"
#include "intrins.h"
sfr
P_SW2
=
#define
I2CCFG
#define
I2CMSCR
#define
I2CMSST
#define
I2CSLCR
#define
I2CSLST
#define
I2CSLADR
#define
I2CTXD
#define
I2CRXD
sfr
P0M1
=
sfr
P0M0
=
sfr
P1M1
=
sfr
P1M0
=
sfr
P2M1
=
sfr
P2M0
=
sfr
P3M1
=
sfr
P3M0
=
sfr
P4M1
=
sfr
P4M0
=
sfr
P5M1
=
sfr
P5M0
=
sbit
SDA
=
sbit
SCL
=
bit
busy;
void I2C_Isr() interrupt 24
{
_push_(P_SW2);
P_SW2 |= 0x80;
if (I2CMSST & 0x40)
{
I2CMSST &= ~0x40;
busy = 0;
}
_pop_(P_SW2);
}
void Start()
{
busy = 1;
I2CMSCR = 0x81;
while (busy);
0xba;
(*(unsigned char volatile xdata *)0xfe80)
(*(unsigned char volatile xdata *)0xfe81)
(*(unsigned char volatile xdata *)0xfe82)
(*(unsigned char volatile xdata *)0xfe83)
(*(unsigned char volatile xdata *)0xfe84)
(*(unsigned char volatile xdata *)0xfe85)
(*(unsigned char volatile xdata *)0xfe86)
(*(unsigned char volatile xdata *)0xfe87)
0x93;
0x94;
0x91;
0x92;
0x95;
0x96;
0xb1;
0xb2;
0xb3;
0xb4;
0xc9;
0xca;
P1^4;
P1^5;
//Clear interrupt flag
//Send START command
- 595 -
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