STC micro STC8A8K64D4 Series Reference Manual page 539

STC8A8K64D4 Series Manual
18.3.4.3 6-bit PWM Mode
When EBSn [1: 0] in the PCA_PWMn register is set to 10, PCAn operates in 6-bit PWM mode, where {0, CL [5:
0]} is compared with the capture registers {EPCnL, CCAPnL [5: 0] }. When PCA modules are operating in 6-bit PWM
mode, the output frequencies of them are the same because all the modules share a single PCA counter. The output duty
ratio of each module is set using the registers {EPCnL, CCAPnL [5: 0]}. The output is low when the value of {0, CL
[5: 0]} is less than {EPCnL, CCAPnL [5: 0]}, and the output is high when the value of {0, CL [5: 0]} is equal to or
greater than {EPCnL , CCAPnL [5: 0]}. When CL [5: 0] overflows from 3F to 00, the contents of {EPCnH, CCAPnH
[5: 0]} are reloaded into {EPCnL, CCAPnL [5: 0]}. This makes it possible to update the PWM without interference.
The structure of PCA module working in 6-bit PWM mode is shown below.
EPCnH CCAPnH[6:0]
reload
EPCnL CCAPnL[6:0]
enable
8-bit comparator
0 CL[6:0]
- ECOMn CAPPn CAPNn MATn TOGn PWMn
0 1 0 0 0
EPCnH CCAPnH[5:0]
reload
EPCnL CCAPnL[5:0]
enable
7-bit comparator
0 CL[5:0]
- ECOMn CAPPn CAPNn MATn TOGn PWMn
0 1 0 0 0
PCA 6-bit PWM mode
Output 0
{0,CL[6:0]}<{EPCnL,CCAPnL[6:0]}
{0,CL[6:0]}>={EPCnL,CCAPnL[6:0]}
Output 1
CL overflow
CCAPMn
ECCFn
0
Output 0
{0,CL[5:0]}<{EPCnL,CCAPnL[5:0]}
{0,CL[5:0]}>={EPCnL,CCAPnL[5:0]}
Output 1
CL overflow
CCAPMn
ECCFn
0
CCPn
CCPn
- 523 -