STC8A8K64D4 Series Manual
P5M1
DATA
P5M0
DATA
ORG
LJMP
ORG
LJMP
ORG
CMPISR:
PUSH
ANL
MOV
JB
FALLING:
CPL
POP
RETI
RSING:
CPL
POP
RETI
MAIN:
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
CLR
ANL
;
ORL
;
ORL
;
ORL
ANL
;
ORL
MOVX
MOV
MOV
ANL
;
ORL
ANL
;
ORL
;
ANL
ORL
MOV
0C9H
0CAH
0000H
MAIN
00ABH
CMPISR
0100H
ACC
CMPCR1,#NOT 40H
A,CMPCR1
ACC.0,RSING
P1.0
ACC
P1.1
ACC
SP, #5FH
P0M0, #00H
P0M1, #00H
P1M0, #00H
P1M1, #00H
P2M0, #00H
P2M1, #00H
P3M0, #00H
P3M1, #00H
P4M0, #00H
P4M1, #00H
P5M0, #00H
P5M1, #00H
P_SW2,#80H
DPTR,# CMPEXCFG
A
A,#NOT 03H
A,#01H
A,#02H
A,#03H
A,#NOT 04H
A,# 04H
@DPTR,A
P_SW2,#00H
CMPCR2,#00H
CMPCR2,#NOT 80H
CMPCR2,#80H
CMPCR2,#NOT 40H
CMPCR2,#40H
CMPCR2,#NOT 3FH
CMPCR2,#10H
CMPCR1,#00H
; Clear interrupt flag
; Falling edge interrupt test port
; Rising edge interrupt test port
; P3.7 is CMP+ input pin
; P5.0 is CMP+ input pin
; P5.1 is CMP+ input pin
; ADC input pin is CMP+ input pin
; P3.6 is CMP- input pin
; Internal reference voltage is CMP- input pin
; Comparator forward output
; Comparator inverted output
; Enable 0.1us filtering
; Disable 0.1us filtering
; Output comparator result directly
; Output comparator result after 16 debounce clocks
- 438 -
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