STC8A8K64D4 Series Manual
hidden interrupt request flag is set to 1, and request an interrupt and wait, it is mistakenly cleared by the user.
This is different from the traditional INTEL8048, 8051, but INTEL has been discontinued, so the new design of STC does
not consider the specifications compatible with traditional INTEL.
This is the further development of 8051 by China STC.
UARTs Control Registers
Symbol
Address
SCON
98H
S2CON
9AH
S3CON
ACH
S4CON
84H
TI: Transmit interrupt flag of UART1, which must be cleared by software.
RI: Receive interrupt flag of UART1, which must be cleared by software.
S2TI: Transmit interrupt flag of UART2, which must be cleared by software.
S2RI: Receive interrupt flag of UART2, which must be cleared by software.
S3TI: Transmit interrupt flag of UART3, which must be cleared by software.
S3RI: Receive interrupt flag of UART3, which must be cleared by software.
S4TI: Transmit interrupt flag of UART4, which must be cleared by software.
S4RI: Receive interrupt flag of UART4, which must be cleared by software.
Power Control Register
Symbol
Address
PCON
87H
LVDF: Low voltage detection interrupt flag, which must be cleared by software.
ADC Control Register
Symbol
Address
ADC_CONTR
BCH
ADC_FLAG: ADC completes conversion interrupt request flag, which must be cleared by software.
SPI Status Register
Symbol
Address
SPSTAT
CDH
SPIF: SPI transmission completion interrupt request flag, which must be cleared by software.
PCA Control Register
Symbol
Address
CCON
D8H
CF: PCA counter interrupt request flag, which must be cleared by software.
CCF3: PCA module 3 interrupt request flag, which must be cleared by software.
CCF2: PCA module 2 interrupt request flag, which must be cleared by software.
CCF1: PCA module 1 interrupt request flag, which must be cleared by software.
CCF0: PCA module 0 interrupt request flag, which must be cleared by software.
Comparator Control Register 1
Symbol
Address
CMPCR1
E6H
CMPIF: Comparator interrupt request flag, which must be cleared by software.
I2C Status Registers
Symbol
Address
I2CMSST
FE82H
I2CSLST
FE84H
2
MSIF: I
C master mode interrupt request flag, which must be cleared by software.
2
ESTAI: I
C slave receives the START event interrupt request flag, which must be cleared by software.
B7
B6
SM0/FE
SM1
S2SM0
-
S3SM0
S3ST3
S4SM0
S4ST4
B7
B6
SMOD
SMOD0
B7
B6
ADC_POWER
ADC_START
B7
B6
SPIF
WCOL
B7
B6
CF
CR
B7
B6
CMPEN
CMPIF
B7
B6
MSBUSY
MSIF
SLBUSY
STAIF
RXIF
B5
B4
SM2
REN
S2SM2
S2REN
S3SM2
S3REN
S4SM2
S4REN
B5
B4
LVDF
POF
B5
ADC_FLAG
ADC_EPWMT
B5
B4
-
-
B5
B4
-
-
B5
B4
PIE
NIE
B5
B4
B3
-
-
-
TXIF
STOIF
-
B3
B2
TB8
RB8
S2TB8
S2RB8
S3TB8
S3RB8
S4TB8
S4RB8
B3
B2
GF1
GF0
B4
B3
ADC_CHS[3:0]
B3
B2
-
-
B3
B2
CCF3
CCF2
B3
B2
PIS
NIS
CMPOE
B2
-
MSACKI
TXING
SLACKI
B1
B0
TI
RI
S2TI
S2RI
S3TI
S3RI
S4TI
S4RI
B1
B0
PD
IDL
B2
B1
B0
B1
B0
-
-
B1
B0
CCF1
CCF0
B1
B0
CMPRES
B1
B0
MSACKO
SLACKO
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