Comparator Extended Configuration Register (Cmpexcfg) - STC micro STC8A8K64D4 Series Reference Manual

STC8A8K64D4 Series Manual
if LCDTY is set to a non-zero value n (n =1~63), the actual digital filtering time is (n+2) system clocks
The digital filtering function is disabled if LCDTY is set to 0.

15.3.3 Comparator Extended Configuration Register (CMPEXCFG)

Symbol Address
CMPEXCFG FEAEH
CHYS[1:0]：Comparator DC Hysteresis Input Selection
CHYS [1:0] Comparator DC Hysteresis Input Selection
00
01
10
11
CMPNS：Comparator negative input selection
0：P3.6
1：The REFV voltage of the internal BandGap after amplified is selected as the comparator negative input source.
(When the chip is shipped, the internal reference voltage is adjusted to
CMPPS[1:0]：Positive of comparator selection bit
CMPPS[1:0] Positive of comparator
00
01
10
11
B7 B6
CHYS[1:0]
0mV
10mV
20mV
30mV
P3.7
P5.0
P5.1
ADCIN
B5 B4 B3
- - -
1.19V)
B2 B1 B0
CMPNS CMPPS[1:0]
- 435 -