STC8A8K64D4 Series Manual
DMA_M2M_AMT
FA03H
DMA_M2M_AMT:
Set
Note: The actual number of bytes read and written is (DMA_M2M_AMT+1), that is, when
DMA_M2M_AMT is set to 0, 1 byte is read and written, and when DMA_M2M_AMT is set to 255, 256
bytes are read and written.
23.2.5 M2M_DMA transfer complete byte register (DMA_M2M_DONE)
Symbol
Address
DMA_M2M_DONE
FA04H
DMA_M2M_DONE: The number of bytes that have been read and written currently.
23.2.6 M2M_DMA Send Address Registers (DMA_M2M_TXAx)
Symbol
Address
DMA_M2M_TXAH
FA05H
DMA_M2M_TXAL
FA06H
DMA_M2M_TXA: Set the source address when reading and writing data. Data will be read from this address when
the M2M_DMA operation is performed.
23.2.7 M2M_DMA Receive Address Registers (DMA_M2M_RXAx)
Symbol
Address
DMA_M2M_RXAH
FA07H
DMA_M2M_RXAL
FA08H
DMA_M2M_RXA: Set the target address when reading and writing data. Data will be written from this address when
the M2M_DMA operation is performed.
the
number
of
bytes
B7
B6
B5
B7
B6
B5
B7
B6
that
need
to
B4
B3
B4
B3
ADDR[15:8]
ADDR[7:0]
B5
B4
B3
ADDR[15:8]
ADDR[7:0]
read
and
write
data.
B2
B1
B0
B2
B1
B0
B2
B1
B0
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